Mounting structure and mounting structure manufacturing method
View Patent ↗A mounting structure which reduces the mechanical stress added to a low-κ material due to warping caused by the difference in thermal expansion coefficients between a chip and a chip support during mounting. This mounting structure includes: a low-κ layer formed on top a semiconductor substrate; an electrode layer formed on the low-κ layer; a protective layer formed the low-κ layer and the electrode layer and having an opening reaching the electrode layer; a first solder layer filling the opening and formed on the electrode layer inside; a second solder layer formed on the first solder layer and having an elastic modulus smaller than the first solder layer; and a support layer connected to the second solder layer and supporting the semiconductor substrate. The protective layer has a greater elastic modulus and a smaller thermal expansion coefficient than an underfill layer formed between the protective layer and the support layer.
1. A mounting structure comprising:
a low-κ layer formed on top of a semiconductor substrate;
an electrode layer formed on top of the low-κ layer;
a protective layer formed on top of the low-κ layer and the electrode layer and having an opening reaching the electrode layer;
a first solder layer filling the opening and formed on top of the electrode layer inside the opening;
a second solder layer formed on top of the first solder layer and having an elastic modulus smaller than the first solder layer; and
a support layer connected to the second solder layer and supporting the semiconductor substrate;
wherein the protective layer has a greater elastic modulus and a smaller thermal expansion coefficient than an underfill layer formed between the protective layer and the support layer; and
wherein side surfaces of the first solder layer are completely surrounded by the protective layer, while side surfaces of the second solder layer are completely surrounded by the underfill layer.
2. The mounting structure according to claim 1 , wherein the protective layer is made of a same material as the support layer.
3. The mounting structure according to claim 1 , wherein the protective layer is made of a polyimide or a silicon oxide.
4. The mounting structure according to claim 1 , wherein the first solder layer is made of a tin (Sn) and a silver (Ag); and
the second solder layer is made of indium (In).
5. A method for manufacturing a mounting structure, the method comprising:
forming a low-κ layer on top of a semiconductor substrate;
forming an electrode layer on top of the low-κ layer;
forming a protective layer on top of the low-κ layer and the electrode layer;
forming a mask layer with an opening pattern on top of the protective layer;
forming an opening on the protective layer that reaches the electrode layer using the mask layer;
filling the opening and forming a first solder layer on top of the electrode layer inside the opening;
removing the mask layer;
forming a second solder layer having an elastic modulus smaller than the first solder layer on top of the first solder layer; and
connecting the second solder layer to a support layer supporting the semiconductor substrate;
wherein the protective layer has a greater elastic modulus and a smaller thermal expansion coefficient than an underfill layer formed between the protective layer and the support layer; and
wherein side surfaces of the first solder layer are completely surrounded by the protective layer, while side surfaces of the second solder layer are completely surrounded by the underfill layer.
6. The manufacturing method according to claim 5 , wherein the formation of the opening in the protective layer includes irradiation of the protective layer with a laser to form the opening.
7. The manufacturing method according to claim 5 , wherein formation of the first solder layer includes filling the opening with the first solder using injection-molding soldering.
8. The manufacturing method according to claim 5 , wherein formation of the second solder layer includes electroplating the first solder layer with the second solder.