Method of making bond pad
A method of making a bonding pad for a semiconductor device which includes forming a first region over a buffer layer, where the first region includes aluminum and having a first average grain size. The method further includes forming a second region over the first region, where the second region includes aluminum, and where the second region has a second average grain size different from the first average grain size. Additionally, the method includes forming a first passivation layer surrounding the first region and the second region. Furthermore, the method includes forming a second passivation layer partially covering the second region, where the first region and the second region extend along a top surface of the first passivation layer.
1. A method of making a bonding pad for a semiconductor device comprising:
forming a first region over a buffer layer, the first region comprising aluminum and having a first average grain size;
forming a second region over the first region, the second region comprising aluminum, wherein the second region has a second average grain size different from the first average grain size;
forming a first passivation layer surrounding the first region and the second region; and
forming a second passivation layer partially covering the second region;
wherein the first region and the second region extend along a top surface of the first passivation layer.
2. The method of claim 1 , wherein the second passivation layer is over the first passivation layer.
3. The method of claim 1 , wherein the first average grain size ranges from 2.0 μm to 4.0 μm.
4. The method of claim 1 , wherein the second average grain size ranges from 0.1 μm to 2.0 μm.
5. The method of claim 1 , wherein the second region has a thickness greater than 10 nanometers.
6. The method of claim 1 , further comprising forming a top metal under the first region.
7. The method of claim 1 , wherein at least one of the first and second regions further comprises copper.
8. A method of making a binding pad for a semiconductor device comprising:
forming a first aluminum region over a buffer layer, the first aluminum region having a first average grain size of 2.0 μm to 4.0 μm;
forming a second aluminum region over the first aluminum region, the second aluminum region having a second average grain size of 0.1 μm to 2.0 μm, wherein the first average grain size is at least 1.5 times greater than the second average grain size;
forming a first passivation layer surrounding the first aluminum region and the second aluminum region; and
forming a second passivation layer partially covering the second aluminum region,
wherein the first aluminum region and the second aluminum region extend along a top surface of the first passivation layer.
9. The method of claim 8 , further comprising forming a top metal under the first aluminum region.
10. The method of claim 9 , wherein the top metal comprises at least one of copper, titanium, or tungsten.
11. The method of claim 8 , wherein the second aluminum region has a thickness greater than 10 nanometers.
12. The method of claim 8 , wherein the second passivation layer is over the first passivation layer.
13. The method of claim 8 , wherein the first passivation layer comprises at least one of silicon oxide, silicon nitride, borophosphosilicate glass, or a low k dielectric material.
14. The method of claim 8 , wherein the buffer layer comprises tantalum nitride or titanium nitride.