Method of fabricating a LDMOS device having a first well depth less than a second well depth

1. A method of fabricating a semiconductor device, the method comprising:

forming a first deep well and a second deep well in a substrate,

wherein a depth of the first deep well is less than a depth of the second deep well,

wherein the first deep well is in direct contact with the substrate, and

wherein a boundary groove separates the first deep well from the second deep well;

forming a body region inside the first deep well, wherein a conductivity type of the body region is different from a conductivity type of the first deep well;

forming a drain region inside the second deep well; and

forming a source region inside the body region.

2. The method of fabricating a semiconductor device of claim 1 ,

wherein a bottom surface of the first deep well includes a non-boundary groove, and

wherein a depth from a peak of the boundary groove to a top surface of the first deep well is less than a depth from a peak of the non-boundary groove to the top surface of the first deep well.

3. The method of fabricating a semiconductor device of claim 1 , further comprising forming a drain extension region inside the second deep well;

wherein the forming of the drain region inside the second deep well comprises forming the drain region inside the drain extension region.

4. The method of fabricating a semiconductor device of claim 1 , wherein a dopant concentration of the first deep well under the body region is smaller than a dopant concentration of the second deep well under the drain region.

5. The method of fabricating a semiconductor device of claim 1 , wherein the forming of the first deep well and the second deep well comprises:

using a deep well mask pattern formed on the substrate, the deep well pattern comprising a stripe.

6. The method of fabricating a semiconductor device of claim 5 , wherein the forming of the first deep well and the second deep well comprises:

forming the deep well mask pattern comprising the stripe on the substrate; and

implanting ions into the substrate through the deep well mask pattern to form the first deep well and the second deep well.

7. The method of fabricating a semiconductor device of claim 5 , wherein the mask pattern comprises a plurality of stripes.

8. The method of fabricating a semiconductor device of claim 7 , wherein a stripe interval between stripes is greater than 0 μm and less than or equal to 3 μm.

9. The method of fabricating a semiconductor device of claim 1 , wherein either or both of: a bottom surface of the first deep well under the body region comprises a plurality of non-boundary grooves, and the bottom surface of the first deep well under the body region has a shape of a wave pattern.

10. The method of fabricating a semiconductor device of claim 1 , wherein a breakdown voltage between the drain region and the source region (BVDSS) is at least 700 V.

11. The method of fabricating a semiconductor device of claim 1 , further comprising:

forming a buried layer in contact with the first deep well, with the body region, and with the substrate, wherein the buried layer has a same conductivity type as the body region.

12. The method of fabricating a semiconductor device of claim 11 , further comprising:

forming an additional buried layer in the second deep well.

13. The method of fabricating a semiconductor device of claim 11 , wherein the buried layer is in contact with the second deep well.

14. The method of fabricating a semiconductor device of claim 1 ,

wherein the boundary groove that separates the first deep well from the second deep well is disposed below a gate oxide layer and not below a local oxidation of silicon (LOCOS) layer.

15. The method of fabricating a semiconductor device of claim 1 ,

wherein a region proximate to the boundary groove has a lower dopant concentration than other regions of the first deep well and the second deep well.

16. A method of fabricating a semiconductor device, the method comprising:

forming a first deep well, a second deep well, and a boundary groove configured to partially separate the first deep well from the second deep well, all in a substrate,

wherein a depth of the first deep well is less than a depth of the second deep well,

wherein the first deep well is in direct contact with the substrate,

wherein a bottom surface of the first deep well includes a non-boundary groove,

wherein a bottom surface of the second deep well is substantially planar, and

wherein a first depth from a peak of the boundary groove to a top surface of the first deep well is less than a second depth from a peak of the non-boundary groove to the top surface of the first deep well, and both the first and second depths are less than a depth from a bottom surface of the first deep well to the top surface of the first deep well;

forming a body region inside the first deep well, wherein a conductivity type of the body region is different from a conductivity type of the first deep well;

forming a drain region inside the second deep well; and

forming a source region inside the body region;

wherein a region proximate to the boundary groove has a lower dopant concentration than other regions of the first deep well and the second deep well.