Semiconductor device with embedded semiconductor die and substrate-to-substrate interconnects
View Patent ↗A semiconductor device having an embedded semiconductor die and substrate-to-substrate interconnects is disclosed and may include a substrate with a top surface and a bottom surface, a semiconductor die bonded to the top surface of the substrate, a first mold material encapsulating the semiconductor die and at least a portion of the top surface of the substrate, and a first conductive bump that is on the top surface of the substrate and is at least partially encapsulated by the first mold material. An extended substrate may be coupled to the substrate utilizing the first conductive bump. A second conductive bump may be formed on the bottom surface of the substrate, and a second mold material may encapsulate at least a portion of the second conductive bump and at least a portion of the bottom surface of the substrate. A third mold material may be formed between the first mold material and the extended substrate.
1. A semiconductor device comprising:
a first substrate comprising a top surface and a bottom surface;
a semiconductor die bonded to the top surface of the first substrate;
a first mold material encapsulating the semiconductor die and at least a portion of the top surface of the first substrate;
a first conductive bump on the top surface of the first substrate and a third conductive bump on the first conductive bump, wherein the first and third conductive bumps are at least partially encapsulated by the first mold material;
a second substrate coupled to the first substrate utilizing the first and third conductive bumps; and
a second conductive bump on the bottom surface of the first substrate.
2. The semiconductor device according to claim 1 , wherein a second mold material encapsulates at least a portion of the second conductive bump, wherein the second mold material is not in contact with the first mold material.
3. The semiconductor device according to claim 1 , wherein the second substrate comprises the third conductive bump.
4. The semiconductor device according to claim 1 , wherein the first and second conductive bumps comprise solder balls and/or copper pillars.
5. The semiconductor device according to claim 1 , wherein the second substrate comprises an interposer.
6. A semiconductor device comprising:
a first substrate comprising a top surface and a bottom surface;
a semiconductor die bonded to the top surface of the first substrate;
a metal pillar on the top surface of the first substrate;
a first mold material encapsulating the semiconductor die, at least a portion of the metal pillar, and at least a portion of the top surface of the first substrate;
a conductive bump on the metal pillar; and
a second substrate coupled to the substrate utilizing the metal pillar and conductive bump.
7. The semiconductor device according to claim 6 , wherein a second conductive bump is formed on the bottom surface of the first substrate.
8. The semiconductor device according to claim 6 , wherein a top surface of the first mold material is in a same plane as a portion of the conductive bump.
9. The semiconductor device according to claim 6 , wherein a top surface of the metal pillar is below a top surface of the first mold material.
10. The semiconductor device according to claim 6 , wherein the second conductive bump comprises solder.
11. The semiconductor device according to claim 6 , wherein the second substrate comprises an interposer.
12. The semiconductor device according to claim 1 , wherein the first mold material comprises a film-type mold.
13. The semiconductor device according to claim 1 , wherein the first conductive bump comprises a metal pillar and solder.
14. The semiconductor device according to claim 1 , wherein the first conductive bump comprises a metal pillar.
15. The semiconductor device according to claim 13 , wherein the metal pillar comprises copper.
16. The semiconductor device according to claim 6 , wherein the first mold material comprises a film-type mold.
17. The semiconductor device according to claim 7 , wherein the second conductive bump comprises a solder ball.
18. The semiconductor device according to claim 6 , wherein the metal pillar comprises copper.
19. A method for fabricating a semiconductor device, the method comprising:
providing a first substrate comprising a top surface and a bottom surface;
providing a semiconductor die bonded to the top surface of the first substrate;
providing a first conductive bump on the top surface of the first substrate;
providing a second conductive bump on the first conductive bump;
providing a first mold material encapsulating the semiconductor die, at least a portion of the first and second conductive bumps, and at least a portion of the top surface of the first substrate; and
providing a second substrate coupled to the first substrate utilizing the first and second conductive bumps.