IP Library Granted Patent US 9,408,301
Granted Patent B2
US 9,408,301 · App. 14/534,482 · Granted Aug 2, 2016

Substrate structures and methods of manufacture

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Quick Facts
Patent No.
US 9,408,301
App. No.
14/534,482
Granted
Aug 2, 2016
Kind
B2
Abstract

A power electronic substrate includes a metallic baseplate having a first and second surface opposing each other. An electrically insulative layer also has first and second surfaces opposing each other, its first surface coupled to the second surface of the metallic baseplate. A plurality of metallic traces each include first and second surfaces opposing each other, their first surfaces coupled to the second surface of the electrically insulative layer. At least one of the metallic traces has a thickness measured along a direction perpendicular to the second surface of the metallic baseplate that is greater than a thickness of another one of the metallic traces also measured along a direction perpendicular to the second surface of the metallic baseplate. In implementations the electrically insulative layer is an epoxy or a ceramic material. In implementations the metallic traces are copper and are plated with a nickel layer at their second surfaces.

Claims (7)

1. A method of forming a direct bonded copper (DBC) substrate for a power electronic, comprising:

coupling a first surface of a ceramic layer to a second surface of a metallic baseplate, the ceramic layer having a second surface opposing the first surface;

coupling a first surface of a copper layer with the second surface of the ceramic layer, the first surface of the copper layer having a pattern comprising a first thickness and a second thickness greater than the first thickness, the first thickness and the second thickness both measured perpendicularly to the first surface of the ceramic layer; and

forming traces in the copper layer by etching through the copper layer at the first thickness and etching through the copper layer at the second thickness, wherein the traces comprise two different trace thicknesses, where the trace thicknesses are measured perpendicularly to the first surface of the ceramic layer.

2. The method of claim 1 , wherein the second surface of the ceramic layer comprises a pattern complementary to the pattern of the first surface of the copper layer.

3. The method of claim 1 , further comprising plating a layer of nickel onto the second surface of the copper layer, and wherein forming traces in the copper layer comprises etching through the layer of nickel.

4. The method of claim 1 , wherein etching through the copper layer at the first thickness and etching through the copper layer at the second thickness comprises coupling a first layer of photoresist to the second surface of the copper layer, forming a pattern in the first layer of photoresist, etching the copper layer at the first thickness at a space in the pattern in the first layer of photoresist, removing the first layer of photoresist, coupling a second layer of photoresist to the second surface of the copper layer, forming a pattern in the second layer of photoresist, etching the copper layer at the second thickness at a space in the pattern in the second layer of photoresist, and removing the second layer of photoresist.

Assignments (5)
SECURITY INTEREST Recorded Jul 13, 2023
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; GTAT CORPORATION
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064271/0971 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 6, 2014
From: LIN, YUSHENG; TAKAKUSAKI, SADAMICHI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034117/0538 →