IP Library Granted Patent US 9,515,623
Granted Patent B2
US 9,515,623 · App. 14/559,895 · Granted Dec 6, 2016

Multiple-state, switch-mode power amplifier systems and methods of their operation

Inventors: Jean-Christophe Nanan (Toulouse, FR); Jean-Jacques Bouny (Fontenilles, FR); Cedric Cassan (Auterive, FR); Joseph Staudinger (Gilbert, AZ); Hugues Beaulaton (Toulouse, FR)
Assignee: FREESCALE SEMICONDUCTOR, INC.
H03F3/2178H03F3/189H03F3/211H03F3/2171H03F3/2175H03F3/2176H03F3/245H03F3/30H03F3/604H03F3/72H03M1/0682H03F2200/09H03F2200/537H03F2200/541H03F2203/21106H03F2203/21142H03F2203/21145H03F2203/21157H03M1/78
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Quick Facts
Patent No.
US 9,515,623
App. No.
14/559,895
Granted
Dec 6, 2016
Kind
B2
Abstract

An embodiment of an amplifier includes N (N>1) switch-mode power amplifier (SMPA) branches. Each SMPA branch includes two drive signal inputs and one SMPA branch output. A module coupled to the amplifier samples an input RF signal, and produces combinations of drive signals based on the samples. When an SMPA branch receives a first combination of drive signals, it produces an output signal at a first voltage level. Conversely, when the SMPA branch receives a different second combination of drive signals, it produces the output signal at a different second voltage level. Finally, when the SMPA branch receives a different third combination of drive signals, it produces the output signal at a voltage level of substantially zero. A combiner combines the output signals from all of the SMPA branches to produce a combined output signal that may have, at any given time, one of 2*N+1 quantization states.

Claims (70)

1. An amplifier comprising:

a number, N, of switch-mode power amplifier (SMPA) branches, wherein N is greater than one, and wherein each SMPA branch includes

two drive signal inputs, so that the amplifier has a total of 2*N drive signal inputs, and

one SMPA branch output, so that the amplifier has a total of N SMPA branch outputs, and wherein,

in response to receiving a first combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, an SMPA branch output signal at a first voltage level, and

in response to receiving a different second combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, the SMPA branch output signal at a different second voltage level; and

a module with a radio frequency (RF) signal input and 2*N drive signal outputs, wherein each of the 2*N drive signal outputs is coupled to one of the 2*N drive signal inputs, and the module is configured to receive an input RF signal at an RF signal input, to sample the input RF signal, resulting in a sequence of samples, and to provide, at the 2*N drive signal outputs, drive signals to each of the N SMPA branches, wherein the states of the drive signals at any given time depend on a magnitude of a sample in the sequence of samples.

2. The amplifier of claim 1 , further comprising:

a combiner with N combiner inputs and a combiner output, wherein each of the combiner inputs is coupled to a different one of the N SMPA branch outputs, and the combiner is configured to combine together the SMPA branch output signal from all of the N SMPA branches to produce, at the combiner output, a combined output signal.

3. The amplifier of claim 2 , wherein the combiner is configured to produce the combined output signal as a signal that is, at any given time, at one of 2*N+1 quantization states.

4. The amplifier of claim 3 , wherein N=2, and the combiner is configured to produce the combined output signal as a signal that is, at any given time, at one of 5 quantization states.

5. The amplifier of claim 3 , wherein N=3, and the combiner is configured to produce the combined output signal as a signal that is, at any given time, at one of 7 quantization states.

6. The amplifier of claim 3 , wherein N=4, and the combiner is configured to produce the combined output signal as a signal that is, at any given time, at one of 9 quantization states.

7. The amplifier of claim 3 , wherein N is an integer between 2 and 10, inclusive.

8. The amplifier of claim 2 , wherein the combiner comprises:

N−1 summing nodes, wherein an output summing node of the N−1 summing nodes is coupled to the combiner output; and

N−1 phase transformers, wherein each phase transformer is coupled to a summing node and is also coupled between SMPA branch outputs of a different set of two adjacent SMPA branches, and wherein the phase transformer is configured to apply a phase delay to the SMPA branch output signal from the SMPA branch that is electrically farther from the output summing node so that the SMPA branch output signals from the two adjacent SMPA branches combine in phase at the summing node to which the phase transformer is coupled.

9. The amplifier of claim 2 , further comprising:

a reconstruction filter coupled to the combiner output, wherein the reconstruction filter is configured to band-pass filter the combined output signal.

10. The amplifier of claim 1 ,

wherein the module is further configured to quantize each sample of the sequence of samples to produce a sequence of quantized digital values, to encode each quantized digital value to produce a sequence of encoded values, and to provide, at the 2*N drive signal outputs, the drive signals to each of the N SMPA branches, wherein the states of the drive signals at any given time depend on an encoded value that is being processed by the module.

11. The amplifier of claim 10 , wherein each encoded value includes at least 2*N bits, each bit corresponds to a different one of the drive signals, and the value of each bit defines whether the drive signal to which the bit corresponds will have a first state, Son, corresponding to a drive signal that will cause a transistor of an SMPA branch to which the drive signal is supplied to be substantially non-conducting, or a second state, SoN, corresponding to a drive signal that will cause the transistor to operate in a saturation region.

12. The amplifier of claim 10 , wherein the module is configured to determine, based on the magnitude of the sample, a combination of drive signals which, for each of the SMPA branches, will cause the SMPA branch either to produce the SMPA branch output signal at the first voltage level, to produce the SMPA branch output signal at the second voltage level, or to produce the SMPA branch output signal at a third voltage level of substantially zero voltage.

13. The amplifier of claim 2 , wherein the combiner imposes phase delays on the SMPA branch output signals from at least some of the N SMPA branches, and the module is configured to provide the drive signals to the SMPA branches with phase offsets that compensate for the phase delays imposed by the combiner.

14. An amplifier comprising:

a module with a radio frequency (RF) signal input and 2*N drive signal outputs, wherein N is greater than one, and wherein the module is configured to receive an input RF signal at the RF signal input, to sample the input RF signal, resulting in a sequence of samples, and to provide, at the 2*N drive signal outputs, drive signals to each of N switch-mode power amplifier (SMPA) branches, wherein the states of the drive signals at any given time depend on the magnitude of a sample in the sequence of samples;

the N SMPA branches, wherein each SMPA branch includes

two drive signal inputs, wherein each drive signal input is coupled to a different one of the 2*N drive signal outputs, and

one SMPA branch output, so that the amplifier has a total of N SMPA branch outputs, and wherein,

in response to receiving a first combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, an SMPA branch output signal at a first voltage level, and

in response to receiving a different second combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, the SMPA branch output signal at a different second voltage level; and

a combiner with N combiner inputs and a combiner output, wherein each of the combiner inputs is coupled to a different one of the N SMPA branch outputs, and the combiner is configured to combine together the SMPA branch output signal from all of the N SMPA branches to produce, at the combiner output, a combined output signal, wherein the combined output signal may have, at any given time, one of 2*N+1 quantization states.

15. The amplifier of claim 14 , wherein:

the module is further configured to determine an encoded value for each sample based on the magnitude of the sample,

each encoded value includes at least 2*N bits, wherein each bit corresponds to a different one of the drive signals, and the value of each bit defines whether the drive signal to which the bit corresponds will have a first state, S OFF , corresponding to a drive signal that will cause a transistor of an SMPA branch to which the drive signal is supplied to be substantially non-conducting, or a second state, S ON , corresponding to a drive signal that will cause the transistor to operate in a saturation region, and

each encoded value corresponds to a combination of drive signals which, for each of the SMPA branches, will cause the SMPA branch either to produce the SMPA branch output signal at the first voltage level, to produce the SMPA branch output signal at the second voltage level, or to produce the SMPA branch output signal at a third voltage level of substantially zero voltage.

16. An amplifier comprising:

a module with a radio frequency (RF) signal input and 2*N drive signal outputs, wherein N is greater than one, and wherein the module is configured to receive an input RF signal at the RF signal input, to sample the input RF signal, resulting in a sequence of samples, and to provide, at the 2*N drive signal outputs, drive signals to each of N switch-mode power amplifier (SMPA) branches, wherein the states of the drive signals at any given time depend on the magnitude of a sample in the sequence of samples;

the N SMPA branches, wherein each SMPA branch includes

two drive signal inputs, wherein each drive signal input is coupled to a different one of the 2*N drive signal outputs,

one SMPA branch output, so that the amplifier has a total of N SMPA branch outputs, and

a class-D, push-pull amplifier that includes two SMPAs and a center-tapped transformer, wherein an input of each of the SMPAs is coupled to a different one of the two drive signal inputs, and an output of each of the SMPAs is coupled to a different end of a first coil of the center-tapped transformer, and wherein a second coil of the center-tapped transformer is coupled to the SMPA branch output, and wherein,

in response to receiving a first combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, an SMPA branch output signal at a first voltage level, and

in response to receiving a different second combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, the SMPA branch output signal at a different second voltage level; and

a combiner with N combiner inputs and a combiner output, wherein each of the combiner inputs is coupled to a different one of the N SMPA branch outputs, and the combiner is configured to combine together the SMPA branch output signal from all of the N SMPA branches to produce, at the combiner output, a combined output signal, wherein the combined output signal may have, at any given time, one of 2*N+1 quantization states.

17. An amplifier comprising:

a module with a radio frequency (RF) signal input and 2*N drive signal outputs, wherein N is greater than one, and wherein the module is configured to receive an input RF signal at the RF signal input, to sample the input RF signal, resulting in a sequence of samples, and to provide, at the 2*N drive signal outputs, drive signals to each of N switch-mode power amplifier (SMPA) branches, wherein the states of the drive signals at any given time depend on the magnitude of a sample in the sequence of samples;

the N SMPA branches, wherein each SMPA branch includes

two drive signal inputs, wherein each drive signal input is coupled to a different one of the 2*N drive signal outputs, and

one SMPA branch output, so that the amplifier has a total of N SMPA branch outputs, and wherein,

in response to receiving a first combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, an SMPA branch output signal at a first voltage level, and

in response to receiving a different second combination of drive signals at the two drive signal inputs, each SMPA branch is configured to produce, at the SMPA branch output, the SMPA branch output signal at a different second voltage level; and

a combiner with N combiner inputs and a combiner output, wherein each of the combiner inputs is coupled to a different one of the N SMPA branch outputs, and the combiner is configured to combine together the SMPA branch output signal from all of the N SMPA branches to produce, at the combiner output, a combined output signal, wherein the combined output signal may have, at any given time, one of 2*N+1 quantization states, wherein the combiner comprises:

N−1 summing nodes, wherein an output summing node of the N−1 summing nodes is coupled to the combiner output, and

N−1 phase transformers, wherein each phase transformer is coupled to a summing node and is also coupled between SMPA branch outputs of a different set of two adjacent SMPA branches, and wherein the phase transformer is configured to apply a phase delay to the SMPA branch output signal from the SMPA branch that is electrically farther from the output summing node so that the SMPA branch output signals from the two adjacent SMPA branches combine in phase at the summing node to which the phase transformer is coupled.

18. A method, performed by an amplifier, for amplifying a time varying signal, the method comprising the steps of:

receiving an input RF signal;

sampling the input RF signal, resulting in a sequence of samples;

providing combinations of drive signals to each of a number, N, of switch-mode power amplifier (SMPA) branches of the amplifier, wherein N is greater than one, and wherein each SMPA branch includes two drive signal inputs, so that the amplifier has a total of 2*N drive signal inputs, and one SMPA branch output, so that the amplifier has a total of N SMPA branch outputs, and wherein the states of the drive signals at any given time depend on a magnitude of a sample in the sequence of samples;

in response to receiving a first combination of drive signals at the two drive signal inputs, producing, by each SMPA branch at the SMPA branch output, an SMPA branch output signal at a first voltage level; and

in response to receiving a different second combination of drive signals at the two drive signal inputs, producing, by each SMPA branch at the SMPA branch output, the SMPA branch output signal at a different second voltage level.

19. The method of claim 18 , further comprising:

quantizing each sample of the sequence of samples to produce a sequence of quantized digital values; and

encoding each quantized digital value to produce a sequence of encoded values, and

wherein the states of the drive signals at any given time depend on an encoded value of the sequence of encoded values that is being processed.

20. The method of claim 19 , wherein:

each encoded value includes at least 2*N bits, each bit corresponds to a different one of the drive signals, and the value of each bit defines whether the drive signal to which the bit corresponds will have a first state, S OFF , corresponding to a drive signal that will cause a transistor of an SMPA branch to which the drive signal is supplied to be substantially non-conducting, or a second state, S ON , corresponding to a drive signal that will cause the transistor to operate in a saturation region, and

each encoded value corresponds to a combination of drive signals which, for each of the SMPA branches, will cause the SMPA branch either to produce the SMPA branch output signal at the first voltage level, to produce the SMPA branch output signal at the second voltage level, or to produce the SMPA branch output signal at a third voltage level of substantially zero voltage.

21. The method of claim 18 , further comprising:

combining together the SMPA branch output signal from all of the N SMPA branches to produce a combined output signal, wherein the combined output signal may have, at any given time, one of 2*N+1 quantization states.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
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To: NXP USA, INC.
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To: NXP USA, INC.
Reel/Frame 040945/0252 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
CHANGE OF NAME Recorded Nov 9, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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To: FREESCALE SEMICONDUCTOR, INC.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2015
From: NANAN, JEAN-CHRISTOPHE; BOUNY, JEAN-JACQUES; CASSAN, CEDRIC; STAUDINGER, JOSEPH; BEAULATON, HUGUES
To: FREESCALE SEMICONDUCTOR, INC.
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Priority Claims (1)
EP 13306658 · Dec 3, 2013 · regional
Continuity (1)
Related Publication 20150155840A1 · Jun 4, 2015