IP Library Granted Patent US 9,443,865
Granted Patent B2
US 9,443,865 · App. 14/575,937 · Granted Sep 13, 2016

Fabricating 3D NAND memory having monolithic crystalline silicon vertical NAND channel

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Quick Facts
Patent No.
US 9,443,865
App. No.
14/575,937
Granted
Sep 13, 2016
Kind
B2
Abstract

Disclosed herein are techniques for fabricating 3D NAND memory devices having a mono-crystalline silicon semiconductor vertical NAND channel. Memory holes are formed in horizontal layers of material above a substrate. A vertically-oriented NAND string is formed in each of the memory holes. Forming the vertically-oriented NAND string channel comprises growing monolithic crystalline silicon upwards in the memory hole from the substrate through all of the plurality of horizontal layers of material. Vapor phase epitaxial growth may be used grow the monolithic crystalline silicon upwards from the bottom of the vertically-oriented NAND channel. Alternatively, a nanowire of monolithic crystalline silicon is synthesized in the memory hole from the substrate at the bottom of the vertically-oriented NAND channel upwards to the top of the vertically-oriented NAND channel.

Claims (77)

1. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:

forming a plurality of horizontal layers of material above a substrate;

forming memory holes that extend vertically through the plurality of horizontal layers of material to the substrate;

forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel having a bottom at the substrate and a top at an uppermost of the plurality of horizontal layers of material, forming an individual one of the NAND strings in a given memory hole including:

forming material for the plurality of non-volatile storage elements for the NAND string in the given memory hole leaving a channel hole that extends vertically through the plurality of horizontal layers of material to the substrate, the non-volatile storage elements of the NAND string surround the channel hole; and

forming the vertically-oriented NAND string channel in the channel hole comprising growing monolithic crystalline silicon upwards from the substrate through all of the plurality of horizontal layers of material, comprising using neopentosilane as a precursor in vapor phase epitaxial growth to grow the monolithic crystalline silicon in the channel hole upwards from the bottom of the vertically-oriented NAND channel upwards to the top of the vertically-oriented NAND channel.

2. The method of claim 1 , wherein the channel hole has vertical sidewalls, and further comprising:

using a nitrogen gas flow to passivate silicon nucleation sites on the sidewalls of the channel hole prior to growing the monolithic crystalline silicon upwards from the substrate through all of the plurality of horizontal layers of material.

3. The method of claim 1 , wherein growing the monolithic crystalline silicon upwards from the substrate through all of the plurality of horizontal layers of material comprises:

forming a vertical NAND string channel having a solid monolithic crystalline silicon core for the entire vertical length of the vertical NAND string channel.

4. The method of claim 1 , further comprising:

forming word lines in a group of the plurality of horizontal layers of material, the word lines being associated with the vertically-oriented NAND strings in the memory holes.

5. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:

forming a first plurality of horizontal layers of silicon oxide above a substrate;

forming a second plurality of horizontal layers of silicon nitride above the substrate, the second plurality of horizontal layers alternating with the first plurality of horizontal layers;

forming memory holes that extend vertically through all of the first and second plurality of horizontal layers to the substrate;

forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel, wherein forming the vertically-oriented NAND string channel comprises growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel; and

replacing the silicon nitride in the second plurality of horizontal layers with metal to form word lines that are associated with the NAND strings.

6. The method of claim 5 , wherein growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel comprises:

using vapor-liquid-solid (VLS) synthesis to grow the mono-crystalline silicon in the memory hole from the substrate upwards for the entire length of the NAND string channel.

7. The method of claim 6 , growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel comprises:

forming gold nano-clusters in the memory holes on the substrate;

introducing a reactant source of silicon into the memory holes after forming the gold nano-clusters; and

annealing at a temperature higher than the gold-silicon eutectic point after introducing the reactant source of silicon.

8. The method of claim 7 , wherein introducing the reactant source of silicon into the memory holes comprises:

using disilane (Si 2 H 6 ) as the reactant source.

9. The method of claim 5 , wherein the memory holes each have a bottom at the substrate and a top at an uppermost of the first and second plurality of horizontal layers, wherein growing a nanowire of mono-crystalline silicon in each respective memory hole from the substrate upwards for the entire length of the NAND string channel comprises:

growing a single nanowire of monolithic crystalline silicon from the substrate at the bottom of the memory hole to the top of the memory hole.

10. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:

forming a first plurality of horizontal layers of sacrificial material above a substrate;

forming a second plurality of horizontal layers of insulating material alternating with the first plurality of horizontal layers of sacrificial material in a stack above the substrate; and

forming memory holes that extend vertically through the horizontal layers of insulating material and the horizontal layers of sacrificial material;

forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel, forming the NAND strings including:

forming material for the plurality of non-volatile storage elements in the memory holes leaving a channel hole that extends vertically from the substrate through the horizontal layers of insulating material and the horizontal layers of sacrificial material; and

forming the vertically-oriented NAND string channel in the channel hole comprising using vapor phase epitaxial growth to grow mono-crystalline silicon upwards from the substrate through all of the horizontal layers of insulating material and all of the horizontal layers of sacrificial material, using the vapor phase epitaxial growth comprises using neopentosilane as a precursor, the mono-crystalline silicon completely filling the channel hole;

removing the sacrificial material from the first plurality of horizontal layers of sacrificial material; and

depositing conductive material in place of the removed sacrificial material.

11. The method of claim 10 , wherein the channel hole has vertical sidewalls that extend from the substrate through the first plurality of horizontal sacrificial layers and the second plurality of horizontal insulating layers, and further comprising:

introducing nitrogen gas into the channel holes to passivate silicon dangling bonds on the vertical sidewalls of the channel hole prior to using vapor phase epitaxial growth to grow the mono-crystalline silicon.

12. The method of claim 10 , wherein using vapor phase epitaxial growth to grow the mono-crystalline silicon upwards from the substrate through all of the horizontal layers of insulating material and all of the horizontal layers of sacrificial material comprises:

growing the mono-crystalline silicon to a height of at least 4 micrometers.

13. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:

forming a plurality of horizontal layers of material above a substrate;

forming memory holes that extend vertically through the plurality of horizontal layers of material;

forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel, wherein forming the vertically-oriented NAND string in each of the memory holes includes:

introducing nitrogen gas into the memory holes to passivate silicon dangling bonds; and

growing mono-crystalline silicon upwards in the memory holes from the substrate after introducing the nitrogen gas into the memory holes.

14. The method of claim 13 , wherein the vertically-oriented NAND strings each have a source side select gate transistor having a source node, wherein growing the mono-crystalline silicon upwards in the memory holes from the substrate after introducing the nitrogen gas into the memory holes comprises forming the source nodes of the source side select gate transistors of the vertically-oriented NAND strings.

15. The method of claim 13 , wherein the memory holes have vertical sidewalls, wherein introducing the nitrogen gas into the memory holes to passivate silicon dangling bonds comprises:

introducing nitrogen gas into the memory holes to passivate silicon dangling bonds on the vertical sidewalls of the memory holes.

16. The method of claim 13 , wherein growing mono-crystalline silicon upwards in the memory holes from the substrate after introducing the nitrogen gas into the memory holes comprises:

using vapor phase epitaxy to grow the mono-crystalline silicon.

17. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:

forming a plurality of horizontal layers above a substrate, at least some of the plurality of horizontal layers comprising silicon;

forming memory holes that extend vertically through the plurality of horizontal layers, the memory holes having vertical sidewalls;

forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel, forming the vertically-oriented NAND string in each of the memory holes including:

introducing nitrogen gas into the memory holes to passivate silicon nucleation sites on the vertical sidewalls of the memory holes; and

epitaxially growing mono-crystalline silicon upwards in the memory holes from the substrate after introducing the nitrogen gas into the memory holes.

18. The method of claim 17 , wherein the memory holes have a bottom at the substrate and a top, wherein epitaxially growing mono-crystalline silicon upwards in the memory holes from the substrate comprises:

epitaxially growing mono-crystalline silicon from the substrate to only one of the lower layers of the plurality of horizontal layers.

19. The method of claim 17 , wherein the forming a plurality of horizontal layers above a substrate comprises:

forming alternating horizontal layers of silicon oxide and silicon nitride above the substrate.

20. The method of claim 19 , further comprising:

replacing the silicon nitride with metal after forming the vertically-oriented NAND string in each of the memory holes, the metal being word lines associated with the vertically-oriented NAND strings.

21. A method for fabricating a three-dimensional (3D) non-volatile storage device, the method comprising:

forming a first plurality of horizontal layers of sacrificial material above a substrate;

forming a second plurality of horizontal layers of insulating material alternating with the first plurality of horizontal layers of sacrificial material in a stack above the substrate; and

forming memory holes that extend vertically through the horizontal layers of insulating material and the horizontal layers of sacrificial material, the memory holes having vertical sidewalls;

forming a vertically-oriented NAND string in each of the memory holes, each vertically-oriented NAND string comprising a plurality of non-volatile storage elements and a vertically-oriented NAND string channel, wherein the vertically-oriented NAND strings each have a source side select transistor having a source node, forming the NAND strings including:

introducing nitrogen gas into the memory holes to passivate silicon dangling bonds on the vertical sidewalls of the memory holes;

epitaxially growing mono-crystalline silicon in the memory holes after introducing the nitrogen gas into the memory holes, wherein growing the mono-crystalline silicon upwards in the memory holes comprises forming the source nodes of the source side select gate transistors of the vertically-oriented NAND strings;

forming material for the plurality of non-volatile storage elements in the memory holes above the mono-crystalline silicon leaving a channel hole above the mono-crystalline silicon in each of the memory holes; and

forming the vertically-oriented NAND string channels in the channel holes;

removing the sacrificial material from the first plurality of horizontal layers of sacrificial material; and

depositing conductive material in place of the removed sacrificial material to form word lines for the vertically-oriented NAND strings in the memory holes.

22. The method of claim 21 , wherein the epitaxially growing mono-crystalline silicon in the memory holes comprises:

using vapor phase epitaxy to grow the mono-crystalline silicon.

Assignments (5)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0807 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2014
From: RABKIN, PETER; PACHAMUTHU, JAYAVEL; ALSMEIER, JOHANN; HIGASHITANI, MASAAKI
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 034555/0954 →