IP Library › Granted Patent US 9,935,565
Granted Patent B2
US 9,935,565 · App. 14/579,163 · Granted Apr 3, 2018

Motor control circuit and method

Inventor: Takashi Ogawa (Gifu-ken, JP)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H02P1/02H02P6/085H02P6/17H02P6/182H02P6/20H02P27/085
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Quick Facts
Patent No.
US 9,935,565
App. No.
14/579,163
Granted
Apr 3, 2018
Kind
B2
Abstract

In accordance with an embodiment, motor control circuit has a first selector connected to a second selector through an analog to digital converter. The first selector has an input that is connected to an external pin. In addition, the second selector has a plurality of inputs and a plurality of outputs, wherein a first register is connected to a first input and a second register is connected to a second output of the second selector. In accordance with another embodiment, at a beginning step of a method for setting a duty of a drive signal of a motor, a duty setting signal is applied to an external pin. The duty setting signal is converted into a digital duty setting signal. One of the digital duty setting signal or a predetermined duty signal is transmitted to a storage register.

Claims (31)

1. A method for setting a duty of a drive signal of a motor, comprising:

applying a duty setting signal to an external pin;

converting the duty setting signal into a digital duty setting signal; and

transmitting one of the digital duty setting signal or a predetermined duty signal to a storage register, wherein transmitting one of the digital duty setting signal or the predetermined duty signal to the storage register includes:

comparing the digital duty setting signal with the predetermined duty signal; and

selecting the digital duty setting signal to be transmitted to the storage register in response to the predetermined duty signal being greater than the digital duty setting signal.

2. The method of claim 1 , wherein applying the duty setting signal to the external pin includes applying the duty setting signal as a direct current (DC) signal.

3. The method of claim 1 , wherein applying the duty setting signal to the external pin includes using a voltage divider network to generate the voltage at the external pin.

4. The method of claim 1 , further including converting the duty setting signal into a digital duty setting signal in response to a control signal from an analog to digital control circuit.

5. The method of claim 4 , further including generating a control signal in response to comparing a value from the storage register with a value from a counter that is indicative of an input pulse width modulation signal and using the control signal to control a summer.

6. The method of claim 1 , further including:

applying another duty setting signal to the external pin; and

converting the another duty setting signal into another digital duty setting signal in response to another predetermined duty signal being less than the digital duty setting signal.

7. A method for setting a duty of a drive signal of a motor, comprising:

applying a duty setting signal to an external pin;

converting the duty setting signal into a digital duty setting signal;

transmitting one of the digital duty setting signal or a predetermined duty signal to a storage register;

applying another duty setting signal to the external pin;

converting the another duty setting signal into another digital duty setting signal in response to response to another predetermined duty signal being less than the digital duty setting signal;

comparing the another digital duty setting signal with the another predetermined duty signal; and

selecting the another digital duty setting signal to be transmitted to the storage register in response to the predetermined duty signal being greater than the another digital duty setting signal.

8. A method for setting a duty of a drive signal of a motor, comprising:

applying a duty setting signal to an external pin;

converting the duty setting signal into a digital duty setting signal; and

transmitting one of the digital duty setting signal or a predetermined duty signal to a storage register, wherein transmitting one of the digital duty setting signal or the predetermined duty signal to the storage register includes:

generating a plurality of duty setting signals to the external pin;

converting each duty setting signal of the plurality of digital duty setting signals;

comparing each digital duty setting signal with the predetermined duty signal; and

selecting the digital duty setting signal to be transmitted to the storage register in response to the predetermined duty signal being greater than the digital duty setting signal.

9. The method of claim 8 , further including storing the number of times the duty setting signal is compared with the predetermined duty signal.

10. The method of claim 9 , further including using the number of times the duty setting signal is compared with the predetermined duty signal to generate a lowest speed duty level.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 5, 2015
From: OGAWA, TAKASHI
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034631/0113 →
Continuity (2)
Provisional Application 61918693 · Dec 20, 2013
Related Publication 20150180390A1 · Jun 25, 2015