IP Library Patent Application 14582089
Patent Application
App. No. 14/582,089

Geometrically Enhanced Resistive Random Access Memory (RRAM) Cell And Method Of Forming Same

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Patent No.
US None
App. No.
14/582,089
Abstract

A memory device (and method of making and using the memory device) includes a first electrode of conductive material, a second electrode of conductive material, and a layer transition metal oxide material that includes first and second elongated portions meeting each other at a sharp corner. Each of the first and second elongated portions is disposed between and in electrical contact with the first and second electrodes.

Claims (45)

1 . A memory device, comprising:

a first electrode of conductive material;

a second electrode of conductive material;

a layer of transition metal oxide material that includes first and second elongated portions meeting each other at a sharp corner, wherein each of the first and second elongated portions includes elongated opposing first and second surfaces and is disposed between and in electrical contact with the first and second electrodes such that:

a portion of the first surface of the first elongated portion adjacent the sharp corner is in electrical contact with the first electrode and a portion of the second surface of the first elongated portion adjacent the sharp corner is in electrical contact with the second electrode, and

a portion of the first surface of the second elongated portion adjacent the sharp corner is in electrical contact with the first electrode and a portion of the second surface of the second elongated portion adjacent the sharp corner is in electrical contact with the second electrode.

2 . The memory device of claim 1 , wherein the first elongated portion extends in a first direction, the second elongated portion extends in a second direction, and the first and second directions are orthogonal to each other.

3 . The memory device of claim 1 , wherein the layer of transition metal oxide material is L-shaped.

4 . The memory device of claim 1 , wherein the transition metal oxide material includes at least one of HfOx, TaOx, TiOx, WOx, Vox, and CuOx.

5 . The memory device of claim 1 , wherein the layer of transition metal oxide material includes a first sublayer of Hf disposed between a second sublayer of TaOx and a third sublayer of HfOx layer.

6 . The memory device of claim 1 , further comprising:

a substrate of a first conductivity type;

first and second regions of a second conductivity type different than the first conductivity type formed in a surface of the substrate;

a conductive gate disposed over and insulated from the substrate, and between the first and second regions;

wherein the second electrode is electrically coupled to the second region.

7 . A method of making a memory device, comprising:

forming a first electrode of conductive material;

forming a second electrode of conductive material; and

forming a layer of transition metal oxide material that includes first and second elongated portions meeting each other at a sharp corner, wherein each of the first and second elongated portions includes elongated opposing first and second surfaces and is disposed between and in electrical contact with the first and second electrodes such that:

a portion of the first surface of the first elongated portion adjacent the sharp corner is in electrical contact with the first electrode and a portion of the second surface of the first elongated portion adjacent the sharp corner is in electrical contact with the second electrode, and

a portion of the first surface of the second elongated portion adjacent the sharp corner is in electrical contact with the first electrode and a portion of the second surface of the second elongated portion adjacent the sharp corner is in electrical contact with the second electrode.

8 . The method of claim 7 , further comprising:

forming a conductive filament across the layer of transition metal oxide material by applying a first voltage across the first and second electrodes.

9 . The method of claim 7 , wherein the first elongated portion extends in a first direction, the second elongated portion extends in a second direction, and the first and second directions are orthogonal to each other.

10 . The method of claim 7 , wherein the layer of transition metal oxide material is L-shaped.

11 . The method of claim 7 , wherein the transition metal oxide material includes at least one of HfOx, TaOx, TiOx, WOx, Vox, and CuOx.

12 . The method of claim 7 , wherein the forming of the layer of transition metal oxide material comprises:

forming a first sublayer of Hf;

forming a second sublayer of TaOx; and

forming a third sublayer of HfOx layer,

wherein the first sublayer is disposed between the second and third sublayers.

13 . The method of claim 7 , further comprising:

forming first and second regions of a first conductivity type in a surface of a substrate of a second conductivity type different than the first conductivity type;

forming a conductive gate disposed over and insulated from the substrate, and between the first and second regions;

electrically coupling the second electrode to the second region.

14 . A method of programming and erasing a memory device having a first electrode of conductive material, a second electrode of conductive material, and a layer of transition metal oxide material that includes first and second elongated portions meeting each other at a sharp corner, wherein each of the first and second elongated portions includes elongated opposing first and second surfaces and is disposed between and in electrical contact with the first and second electrodes, and a conductive filament extending through the layer of transition metal oxide material, such that:

a portion of the first surface of the first elongated portion adjacent the sharp corner is in electrical contact with the first electrode and a portion of the second surface of the first elongated portion adjacent the sharp corner is in electrical contact with the second electrode, and

a portion of the first surface of the second elongated portion adjacent the sharp corner is in electrical contact with the first electrode and a portion of the second surface of the second elongated portion adjacent the sharp corner is in electrical contact with the second electrode;

the method comprising:

rupturing the filament by applying a first voltage across the first and second electrodes such that the layer of transition metal oxide material provide a first electrical resistance between the first and second electrodes; and

restoring the ruptured filament by applying a second voltage across the first and second electrodes such that the layer of transition metal oxide material provide a second electrical resistance between the first and second electrodes that is lower than the first electrical resistance.

15 . The method of claim 14 , wherein the first elongated portion extends in a first direction, the second elongated portion extends in a second direction, and the first and second directions are orthogonal to each other.

16 . The method of claim 14 , wherein the layer of transition metal oxide material is L-shaped.

17 . The method of claim 14 , wherein the transition metal oxide material includes at least one of HfOx, TaOx, TiOx, WOx, Vox, and CuOx.

18 . The method of claim 14 , wherein the layer of transition metal oxide material includes a first sublayer of Hf disposed between a second sublayer of TaOx and a third sublayer of HfOx layer.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0001 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 059687/0344 →
RELEASE OF SECURITY INTEREST Recorded Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059333/0222 →
SECURITY INTEREST Recorded Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
SECURITY INTEREST Recorded Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
SECURITY INTEREST Recorded Feb 10, 2017
From: SILICON STORAGE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0316 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2015
From: ZHOU, FENG; LIU, XIAN; DO, NHAN; TRAN, HIEU VAN; NGUYEN, HUNG QUOC
To: SILICON STORAGE TECHNOLOGY, INC.
Reel/Frame 034803/0763 →