Integrated antenna for RFIC package applications

1. A chip package, comprising:

a plurality of layers including conductive planes connected by vias, the layers including:

a first portion having at least one antenna, antenna ground plane, and first grounded vias formed therein;

a second portion having a conductive plane parallel to the ground plane that forms an interface for connecting to at least one integrated circuit device; and

a third portion between the first and the second portion comprising:

a vertical transmission line that includes a signal via connecting the antenna feed line to the at least one integrated circuit; and

a parallel-plate mode suppression mechanism, the parallel-plate mode suppression mechanism including a grounded reflector that forms a cage with the grounded vias around an antenna region and further including second ground vias surrounding the signal via.

2. The chip package as recited in claim 1 , wherein the at least one integrated circuit includes a radio frequency integrated circuit chip.

3. The chip package as recited in claim 1 , wherein the at least one integrated circuit includes a printed circuit board.

4. The chip package as recited in claim 1 , wherein the first grounded vias include a spacing dependent on an operating wavelength of the antenna.

5. The chip package as recited in claim 1 , wherein the first grounded vias include a spacing of less than 0.25 times an operating wavelength of the antenna.

6. The chip package as recited in claim 1 , wherein the antenna includes one of a regular, a stacked or a cavity-backed aperture-coupled patch antenna.

7. The chip package as recited in claim 1 , wherein the antenna includes one of a slot or a slot loop antenna.

8. The chip package as recited in claim 1 , wherein the vertical transmission line includes differential transmission lines for a differential antenna.

9. A system, comprising:

a radio frequency integrated circuit (RFIC);

a package structure including a plurality of layers having conductive planes connected by vias;

the package structure having a first portion and a second portion on opposing sides, the first portion including at least one antenna and ground plane integrated in the package structure, the second portion including pads to bond with the RFIC and at least one conductive plane parallel to the ground plane;

a vertical transmission line that includes a signal via connecting the antenna feed line to the RFIC; and

a parallel-plate mode suppression mechanism, the parallel-plate mode suppression mechanism including a grounded reflector and first grounded vias to at least partially form a cage round an antenna region, the reflector further including second ground vias surrounding the signal via.

10. The system as recited in claim 9 , wherein the second portion includes additional pads to connect to a printed circuit board.

11. The system as recited in claim 9 , wherein the first grounded vias include a spacing dependent on an operating wavelength of the antenna.

12. The system as recited in claim 9 , wherein the first grounded vias include a spacing of less than 0.25 times an operating wavelength of the antenna.

13. The system as recited in claim 9 , wherein the antenna includes one of a regular, a stacked or a cavity-backed aperture-coupled patch antenna.

14. The system as recited in claim 9 , wherein the antenna includes one of a slot or a slot loop antenna.

15. The system as recited in claim 9 , wherein the vertical transmission line includes differential transmission lines for a differential antenna.