IP Library Granted Patent US 9,582,192
Granted Patent B2
US 9,582,192 · App. 14/616,445 · Granted Feb 28, 2017

Geometry aware block reclamation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,582,192
App. No.
14/616,445
Granted
Feb 28, 2017
Kind
B2
Abstract

A storage device may include a plurality of memory devices, and a controller. The controller may be configured to perform garbage collection to reclaim one or more blocks included in a particular memory device of the plurality of memory devices by at least: removing the particular memory device from the set of write-eligible memory devices; reading data from the one or more blocks included in the particular memory device; and returning the particular memory device to the set of write-eligible memory devices.

Claims (66)

1. A method comprising:

writing, by a controller of a plurality of memory devices, data to memory devices that are logically included in a set of write-eligible memory devices of the plurality of memory devices; and

performing, by the controller, garbage collection to reclaim one or more blocks included in a particular memory device of the plurality of memory devices by at least:

logically removing the particular memory device from the set of write-eligible memory devices;

reading data from the one or more blocks included in the particular memory device; and

logically returning the particular memory device to the set of write-eligible memory devices.

2. The method of claim 1 , wherein:

the plurality of memory devices are physically arranged into a plurality of channels and logically arranged into a plurality of die-sets,

writing data to memory devices logically included in the set of write-eligible memory devices comprises writing data to memory devices logically included in a set of write-eligible die-sets of the plurality of die-sets, and

performing garbage collection on the one or more blocks included in the particular memory device comprises performing garbage collection on one or more blocks included in a particular die-set of the plurality of die-sets by at least:

logically excluding the particular die-set from the set of write-eligible die-sets;

reading data from the one or more blocks included in the particular die-set; and

logically returning the particular die-set to the set of write-eligible die-sets.

3. The method of claim 1 , wherein reading data from the one or more blocks included in the particular memory device comprises reading data from the one or more blocks included in the particular memory device while the particular memory device is not logically included in the set of write-eligible memory devices.

4. The method of claim 1 , wherein writing data to the memory devices logically included in the set of write-eligible memory devices comprises writing data received from a host device to the memory devices logically included in the set of write-eligible memory devices while the particular memory device is logically removed from the set of write-eligible memory devices.

5. The method of claim 1 , wherein the particular memory device is logically returned to the set of write-eligible memory devices in response to determining that the controller has completed reading the data from the one or more blocks included in the particular memory device.

6. The method of claim 1 , wherein performing garbage collection on the one or more blocks further comprises writing at least some of the data read from the one or more blocks back to a block of the particular memory device after the particular memory device has been logically returned to the set of write-eligible memory devices.

7. The method of claim 1 , wherein performing garbage collection on the one or more blocks further comprises writing at least some of the data read from the one or more blocks to blocks of another memory device of the plurality of memory devices.

8. A storage device comprising:

a plurality of memory devices; and

a controller configured to perform garbage collection to reclaim one or more blocks included in a particular memory device of the plurality of memory devices by at least:

logically removing the particular memory device from a set of write-eligible memory devices;

reading data from the one or more blocks included in the particular memory device; and

logically returning the particular memory device to the set of write-eligible memory devices.

9. The storage device of claim 8 , wherein:

the plurality of memory devices are physically arranged into a plurality of channels and logically arranged into a plurality of die-sets,

the controller is configured to write data to memory devices logically included in the set of write-eligible memory devices by at least writing data to memory devices included in a set of write-eligible die-sets of the plurality of die-sets,

the controller is configured to perform garbage collection on the one or more blocks included in the particular memory device by at least performing garbage collection on one or more blocks included in a particular die-set of the plurality of die-sets, and

the controller is configured to perform garbage collection on the one or more blocks included in the particular die-set of the plurality of die-sets by at least:

excluding the particular die-set from the set of write-eligible die-sets;

reading data from the one or more blocks included in the particular die-set; and

returning the particular die-set to the set of write-eligible die-sets.

10. The storage device of claim 8 , wherein, to read data from the one or more blocks included in the particular memory device, the controller is configured to read data from the one or more blocks included in the particular memory device while the particular memory device is not logically included in the set of write-eligible memory devices.

11. The storage device of claim 8 , wherein, to write data to the memory devices logically included in the set of write-eligible memory devices, the controller is configured to write data received from a host device to the memory devices logically included in the set of write-eligible memory devices while the particular memory device is logically removed from the set of write-eligible memory devices.

12. The storage device of claim 8 , wherein the controller is configured to logically return the particular memory device to the set of write-eligible memory devices after reading the data from the one or more blocks included in the particular memory device.

13. The storage device of claim 8 , wherein, to perform garbage collection on the one or more blocks, the controller is further configured to write at least some of the data read from the one or more blocks back to a block of the particular memory device after the particular memory device has been logically returned to the set of write-eligible memory devices.

14. The storage device of claim 8 , wherein, to perform garbage collection on the one or more blocks, the controller is further configured to write at least some of the data read from the one or more blocks to blocks of another memory device of the plurality of memory devices.

15. A non-transitory computer-readable storage medium storing instructions that, when executed, cause one or more processors of a storage device to:

write data to memory devices of a plurality of memory devices that are included in a set of write-eligible memory devices; and

perform garbage collection to reclaim one or more blocks included in a particular memory device of the plurality of memory devices by at least:

logically removing the particular memory device from the set of write-eligible memory devices;

reading data from the one or more blocks included in the particular memory device; and

logically returning the particular memory device to the set of write-eligible memory devices.

16. The non-transitory computer-readable storage medium of claim 15 , wherein:

the plurality of memory devices are physically arranged into a plurality of channels and logically arranged into a plurality of die-sets,

the instructions that cause the one or more processors to write data to memory devices logically included in the set of write-eligible memory devices comprise instructions that cause the one or more processors to write data to memory devices logically included in a set of write-eligible die-sets of the plurality of die-sets, and

the instructions that cause the one or more processors to perform garbage collection on the one or more blocks included in the particular memory device comprise instructions that cause the one or more processors to perform garbage collection on one or more blocks included in a particular die-set of the plurality of die-sets by at least:

logically excluding the particular die-set from the set of write-eligible die-sets;

reading data from the one or more blocks included in the particular die-set; and

logically returning the particular die-set to the set of write-eligible die-sets.

17. The non-transitory computer-readable storage medium of claim 15 , wherein reading data from the one or more blocks included in the particular memory device comprises reading data from the one or more blocks included in the particular memory device while the particular memory device is not logically included in the set of write-eligible memory devices.

18. A system comprising:

means for writing data to memory devices of a plurality of memory devices logically included in a set of write-eligible memory devices; and

means for performing garbage collection to reclaim one or more blocks included in a particular memory device of the plurality of memory devices, wherein the means for performing garbage collection include:

means for logically removing the particular memory device from the set of write-eligible memory devices;

means for reading data from the one or more blocks included in the particular memory device; and

means for logically returning the particular memory device to the set of write-eligible memory devices.

19. The system of claim 18 , wherein:

the plurality of memory devices are physically arranged into a plurality of channels and logically arranged into a plurality of die-sets,

the means for writing data to memory devices logically included in the set of write-eligible memory devices comprise means for writing data to memory devices logically included in a set of write-eligible die-sets of the plurality of die-sets,

the means for performing garbage collection on the one or more blocks included in the particular memory device comprise means for performing garbage collection on one or more blocks included in a particular die-set of the plurality of die-sets, and

the means for performing garbage collection on the one or more blocks included in the particular die-set of the plurality of die-sets include:

means for logically excluding the particular die-set from the set of write-eligible die-sets;

means for reading data from the one or more blocks included in the particular die-set; and

means for logically returning the particular die-set to the set of write-eligible die-sets.

20. The system of claim 18 , wherein the means for writing data to the memory devices included in the set of write-eligible memory devices comprise means for writing data received from a host device to the memory devices logically included in the set of write-eligible memory devices while the particular memory device is logically removed from the set of write-eligible memory devices.

Assignments (11)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040829/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2015
From: CHOUDHURI, SIDDHARTH; LIU, HAINING; PAVLENKO, YURIY
To: HGST NETHERLANDS B.V.
Reel/Frame 034911/0322 →