Apparatus and method for software enabled access to protected hardware resources
View Patent ↗A semiconductor includes a set of protected hardware resources, where at least one protected hardware resource stores a secure key. The semiconductor also includes a computation kernel and a memory to store a resource enablement module executed by the computation kernel. The resource enablement module selectively enables a protected hardware resource in response to a delivered key corresponding to the secure key.
1. A semiconductor, comprising:
a plurality of protected hardware resources, wherein each protected hardware resource stores a secure key written to the semiconductor by a manufacturer of the semiconductor and wherein the plurality of protected hardware resources include different discrete computational resources selected from a processing core, an encryption block, a digital signal processor and a graphics processor;
a computation kernel; and
a memory to store a resource enablement module with instructions executed by the computation kernel;
wherein the resource enablement module selectively enables a protected hardware resource in response to a delivered key matching the secure key, wherein the delivered key is received from the manufacturer via a network, and wherein the resource enablement module further tests for an operation restriction corresponding to one or more operating parameters of the semiconductor resulting in full access or restricted access to the protected hardware resource.
2. The semiconductor of claim 1 wherein the resource enablement module selectively enables the protected hardware resource in response to a combination of the delivered key matching the secure key and the satisfaction of a specified condition.
3. The semiconductor of claim 2 wherein the resource enablement module denies access to the protected hardware resource when the specified condition is not satisfied.
4. The semiconductor of claim 2 wherein the specified condition is a time window.
5. The semiconductor of claim 2 wherein the specified condition is permitted geo-location parameters for the semiconductor.
6. The semiconductor of claim 1 wherein the operation restriction includes modulating power consumption of the semiconductor to establish required computation power.
7. The semiconductor of claim 1 wherein the operation restriction includes modulating cycle frequency of the semiconductor to establish required computation power.
8. The semiconductor of claim 1 wherein the operation restriction includes modulating quality of service supported by the semiconductor.
9. The semiconductor of claim 1 wherein the operation restriction includes gating permitted software applications.
10. The semiconductor of claim 1 wherein each protected hardware resource further comprises an enable register and a comparator.
11. The semiconductor of claim 10 wherein the resource enablement module writes the delivered key to the enable register and the comparator selectively provides an indication of a match between the delivered key and the secure key.
12. A computer, comprising:
a network interface circuit in communication with a key distribution module; and
a semiconductor coupled to the network interface circuit, wherein the semiconductor includes:
a plurality of protected hardware resources, wherein each protected hardware resource stores a secure key written to the semiconductor by a manufacturer of the semiconductor and wherein the plurality of protected hardware discrete computational resources selected from a processing core, an encryption block, a digital signal processor and a graphics processor,
a computation kernel, and
a memory to store a resource enablement module with instructions executed by the computation kernel, wherein the resource enablement module selectively enables a protected hardware resource in response to a delivered key from the key distribution module that matches the secure key, wherein the delivered key is received from the manufacturer via a network, and wherein the resource enablement module further tests for an operation restriction corresponding to one or more operating parameters of the semiconductor resulting in full access or restricted access to the protected hardware resource.
13. The computer of claim 12 wherein the resource enablement module selectively enables the protected hardware resource in response to a combination of the delivered key that matches the secure key and the satisfaction of a specified condition.
14. The computer of claim 13 wherein the resource enablement module denies access to the protected hardware resource when the specified condition is not satisfied.
15. The computer of claim 12 wherein the operation restriction includes modulating power consumption of the semiconductor to establish required computation power.
16. The computer of claim 12 wherein the operation restriction includes modulating cycle frequency of the semiconductor to establish required computation power.
17. The computer of claim 12 wherein the operation restriction includes modulating quality of service supported by the semiconductor.
18. The computer of claim 12 wherein the operation restriction includes gating permitted software applications.