Trench semiconductor device having multiple trench depths and method
In one embodiment, a trench Schottky rectifier includes a termination trench and active trenches provided in a semiconductor layer. The active trenches are configured to be at a shallower depth than the termination trench to provide a trench depth difference. The selected trench depth difference in combination with one or more of the dopant concentration of the semiconductor layer, the thickness of the semiconductor layer, active trench width to termination trench width, and/or dopant profile of the semiconductor layer provide a semiconductor device having improved performance characteristics.
1. A semiconductor device comprising:
a region of semiconductor material having a first conductivity type and a major surface;
a termination trench extending from a first portion of the major surface into the region of semiconductor material, wherein at least a portion of the termination trench extends to a first depth, and wherein the termination trench has a first width;
an active trench extending from a second portion of the major surface into the region of semiconductor material to a second depth, wherein the active trench has a second width less than the first width, and wherein the first depth is greater than the second depth, and wherein a portion of the region of semiconductor material is laterally interposed between the active trench and the termination trench in a cross-sectional view, and wherein the portion of the region of semiconductor material is devoid of trench structures whereby the active trench is a closest trench structure to the termination trench in the cross-sectional view;
a first conductive material having a first portion within the active trench and separated from the region of semiconductor material by a first dielectric region and a second portion within the termination trench separated from the region of semiconductor material by a second dielectric region;
a second conductive material adjoining a third portion of the major surface, wherein the second conductive material is configured to provide a Schottky barrier; and
a conductive layer electrically coupling the second conductive material to the first portion and the second portion of the first conductive material.
2. The semiconductor device of claim 1 , wherein the first depth is greater than the second depth in a range greater than zero to approximately 3.0 microns.
3. The semiconductor device of claim 1 , wherein the first depth is greater than the second depth in a range greater than zero to approximately 2.0 microns.
4. The semiconductor device of claim 1 , wherein the first depth is greater than the second depth in a range greater than zero to approximately 1.5 microns.
5. The semiconductor device of claim 1 , wherein the semiconductor device has a second width to first width ratio in a range from approximately 0.005 to approximately 0.125.
6. The semiconductor device of claim 1 , wherein the semiconductor device has a second width to first width ratio that is less than or equal to approximately 0.03.
7. The semiconductor device of claim 1 , wherein:
the region of semiconductor material comprises a semiconductor layer adjoining a semiconductor substrate;
the semiconductor layer defines the major surface; and
the semiconductor layer has a first dopant concentration and the semiconductor substrate has a second dopant concentration greater than the first dopant concentration.
8. The semiconductor device of claim 7 , wherein surfaces of the termination trench adjoining the semiconductor layer are configured to provide a field shaping effect for the semiconductor device.
9. The semiconductor device of claim 7 , wherein:
the semiconductor layer has a thickness from approximately 1.5 microns to approximately 2.5 microns;
the first dopant concentration is in a range from approximately 1.0×10 16 atoms/cm 3 and approximately 1.0×10 17 atoms/cm 3 ; and
the first depth is greater than the second depth in a range greater than zero to approximately 2.0 microns.
10. The semiconductor device of claim 7 , wherein:
the semiconductor layer has a thickness from approximately 2.25 microns to approximately 3.25 microns;
the first dopant concentration is in a range from approximately 1.5×10 16 atoms/cm 3 and approximately 8.0×10 16 atoms/cm 3 ; and
the first depth is greater than the second depth in a range greater than zero to approximately 1.8 microns.
11. The semiconductor device of claim 7 , wherein:
the semiconductor layer has a thickness from approximately 2.7 microns to approximately 4.5 microns;
the first dopant concentration is in a range from approximately 1.0×10 16 atoms/cm 3 and approximately 6.0×10 16 atoms/cm 3 ; and
the first depth is greater than the second depth in a range greater than zero to approximately 1.5 microns.
12. The semiconductor device of claim 7 , wherein the semiconductor layer has a non-uniform dopant profile.
13. The semiconductor device of claim 7 , wherein the first depth is greater than the second depth to define a trench depth difference, and wherein the dopant concentration of the semiconductor layer is approximately 6.0×10 16 atoms/cm 3 such that breakdown voltage of the semiconductor device is substantially constant over a range of trench depth difference between approximately 0.1 microns and approximately 1.0 microns.
14. The semiconductor device of claim 1 , wherein the dielectric region has a thickness in range from approximately 0.05 microns to approximately 0.5 microns.
15. The semiconductor device of claim 1 further comprising a doped layer adjoining the third portion of the major surface adjacent to the second conductive material.
16. The semiconductor device of claim 1 further comprising a doped region of a second conductivity type adjoining a side surface of the active trench.
17. The semiconductor device of claim 1 , wherein the second portion of the first conductive material comprises a conductive spacer along a sidewall surface of the termination trench.
18. A semiconductor device comprising:
a region of semiconductor material comprising a semiconductor layer adjoining a semiconductor substrate, the semiconductor layer defining a major surface, wherein the semiconductor layer has a first dopant concentration and the semiconductor substrate has a second dopant concentration greater than the first dopant concentration;
a termination trench extending from a first portion of the major surface into the region of semiconductor material, wherein the first trench extends to a first depth, and wherein the termination trench has a first width;
a plurality of active trenches each extending from a second portion of the major surface into the region of semiconductor material to a second depth, wherein each active trench has a second width less than the first width, and wherein the first depth is greater than the second depth to define a trench depth difference, wherein one of the active trenches is disposed in the region of semiconductor material as a closest trench structure to the termination trench;
a first conductive material within each active trench and separated from the region of semiconductor material by a dielectric region; and
a second conductive material having a first portion adjoining a third portion of the major surface, wherein the first portion of the second conductive material is configured to provide a Schottky barrier, and wherein the second conductive material has a second portion adjoining the first conductive material, and wherein a gap laterally separates the first portion and the second portion of the second conductive material.
19. The semiconductor device of claim 18 , wherein:
the trench depth difference is in a range from greater than zero but less than approximately 1.0 micron;
the first dopant concentration is approximately 6.0×10 16 atoms/cm 3 whereby breakdown voltage of the Schottky semiconductor device remains substantially unchanged over the range.
20. A Schottky semiconductor device comprising:
a region of semiconductor material comprising a semiconductor layer adjoining a semiconductor substrate, the semiconductor layer defining a major surface, wherein the semiconductor layer has a first dopant concentration and the semiconductor substrate has a second dopant concentration greater than the first dopant concentration;
a termination trench extending from a first portion of the major surface into the region of semiconductor material, wherein the termination trench extends to a first depth, and wherein the termination trench has a first width; and
an active trench extending from a second portion of the major surface into the region of semiconductor material to a second depth, wherein the active trench has a second width less than the first width, and wherein the first depth is greater than the second depth to provide a trench depth difference, where the trench depth difference is greater than zero and less than approximately 3.0 microns, and wherein a portion of the region of semiconductor material is laterally interposed between the active trench and the termination trench in a cross-sectional view, and wherein the portion of the region of semiconductor material is devoid of trench structures so that the active trench is a closest trench structure to the termination trench in the cross-sectional view;
a first conductive material within the second trench and separated from the region of semiconductor material by a dielectric region;
a second conductive material adjoining a third portion of the major surface, wherein the second conductive material is configured to provide a Schottky barrier;
a conductive spacer along a sidewall surface of the termination trench, wherein the second conductive material is physically attached to the conductive spacer and the first conductive material; and
a conductive layer disposed adjacent the major surface electrically connected to the second conductive material so that the second conductive material is interposed between the conductive spacer and the conductive layer.