Graded vias for LED chip P- and N- contacts
View Patent ↗The present disclosure provides various embodiments of light emitting chips and packages with improved current spreading structures, such as non-uniform via structures or varied via structures. In some embodiments, these structures may be used to regulate current flow and current crowding in order to improve emitter efficiency and uniformity. Some embodiments of this disclosure may also refer to contact pad placement to improve current flow. In some embodiments of non-uniform via structures, the size of the vias may vary, whereas in other embodiments, the shape or spacing between the vias may vary.
1. A light emitting diode (LED) chip, comprising:
an active LED structure comprising an active layer between two oppositely doped epitaxial layers, and said active layer emitting light in response to an electrical signal applied to said oppositely doped layers; and
a plurality of non-uniform vias providing an electrical path to at least one of said oppositely doped layers, wherein said non-uniform vias protrude into at least one of said oppositely doped epitaxial layers.
2. The LED chip of claim 1 , wherein said non-uniform vias have different sizes.
3. The LED chip of claim 1 , wherein said non-uniform vias have different shapes.
4. The LED chip of claim 1 , wherein said non-uniform vias comprise different materials.
5. The LED chip of claim 1 , wherein said non-uniform vias are spaced apart at different intervals.
6. The LED chip of claim 1 , wherein said LED chip has improved efficiency compared to an LED chip constructed in the same manner with a plurality of uniform vias.
7. The LED chip of claim 1 , wherein said oppositely doped epitaxial layers comprise a n-type layer and a p-type layer and wherein said non-uniform vias protrude through said p-type layer providing an electrical path to said n-type layer.
8. The LED chip of claim 1 , wherein said oppositely doped epitaxial layers comprise a n-type layer and a p-type layer, and said LED chip further comprises a second plurality of non-uniform vias in contact with said p-type layer.
9. The LED chip of claim 1 , further comprising a current spreading layer on at least one of said oppositely doped epitaxial layers, wherein said current spreading layer has a non-uniform thickness.
10. The LED chip of claim 1 , further comprising an at least one contact pad.
11. The LED chip of claim 10 , wherein said non-uniform vias increase in size in relation to distance from said at least one contact pad.
12. The LED chip of claim 10 , wherein the interval between said non-uniform vias decreases in relation to distance from said at least one contact pad.
13. The LED chip of claim 1 , further comprising a plurality of contact pads arranged to increase current flow uniformity across said LED chip.
14. The LED chip of claim 1 , further comprising a plurality of contact pads, wherein an at least one of said contact pads is arranged proximate to three different corners of said LED chip.
15. The LED chip of claim 1 , wherein said LED chip comprises a multi-junction chip and said plurality of non-uniform vias are arranged to increase current flow along the edges of bordering junctions.
16. The LED chip of claim 1 , wherein said plurality of non-uniform vias increases current flow to at least an edge of said LED chip.
17. The LED chip of claim 1 , wherein said plurality of non-uniform vias are between a substrate and said active layer.
18. The LED chip of claim 1 , wherein said plurality of non-uniform vias are on a side of said active layer opposite a substrate.
19. A light emitting diode (LED) chip, comprising:
an active region comprised of an n-type layer and a p-type layer; and
a plurality of non-uniform vias protruding through said p-type layer and in electrical contact with said n-type layer.
20. The LED chip of claim 19 , wherein said non-uniform vias are electrically isolated from said p-type layer.
21. The LED chip of claim 19 , wherein said non-uniform vias have different sizes.
22. The LED chip of claim 19 , wherein said non-uniform vias have different shapes.
23. The LED chip of claim 19 , wherein said non-uniform vias are spaced apart at different intervals.
24. The LED chip of claim 19 , wherein said non-uniform vias comprise different materials.
25. The LED chip of claim 19 , wherein said LED chip has improved efficiency compared to an LED chip constructed in the same manner with a plurality of uniform vias.
26. The LED chip of claim 19 , further comprising a second plurality of non-uniform vias in contact with said p-type layer.
27. The LED chip of claim 19 , further comprising an at least one contact pad.
28. The LED chip of claim 27 , wherein a first via of said plurality of non-uniform vias, which is closer to said at least one contact pad, is smaller in size than a second via, which is further from said at least one contact pad.
29. The LED chip of claim 27 , wherein the interval between a first two adjacent vias of said plurality of non-uniform vias is larger than the interval between a second two adjacent vias, wherein said first two adjacent vias are closer to said at least one contact pad than said second two adjacent vias.
30. The LED chip of claim 19 , further comprising a plurality of contact pads arranged to increase current flow uniformity across said LED chip.
31. The LED chip of claim 19 , wherein said plurality of non-uniform vias increases current flow to at least an edge of said LED chip.
32. The LED chip of claim 19 , wherein said plurality of non-uniform vias increases current flow to at least the center of said LED chip.
33. A light emitting diode (LED) chip, comprising:
a multi-junction LED structure comprising an active layer between two oppositely doped epitaxial layers, said active layer emitting light in response to an electrical signal applied to said oppositely doped layers; and
a plurality of vias providing an electrical path to at least one of said oppositely doped, wherein at least a portion of said plurality of vias are non-uniform.
34. The LED chip of claim 33 , wherein said plurality of non-uniform vias increase current flow along an edge of a first junction of said multi-junction LED structure, wherein said edge is adjacent to a second junction of said multi-junction LED structure.
35. The LED chip of claim 33 , wherein said plurality of vias is non-uniform within at least one of said junctions of said multi-junction LED structure.
36. The LED chip of claim 33 , wherein said plurality of vias of a first junction of the multi-junction LED structure are non-uniform with respect to vias of a second junction of said multi-junction LED structure.