Granted Patent B2

US 9,507,654 · App. 14/694,601 · Granted Nov 29, 2016

Abstract

Claims (88)

1. A processing system comprising:

a first processing system element;

a second processing system element configured to communicate with the first processing system element, wherein the second processing system element includes:

a set of messaging queues, each of the messaging queues includes one or more entries for storing data;

a set of delegate queue addresses, each of the set of delegate queue addresses is associated with one of the set of messaging queues;

a delegate queue associated with the set of messaging queues, the delegate queue including a set of entries corresponding to the delegate queue addresses, and each of the entries of the delegate queue indicating whether a corresponding one of the set of messaging queues is storing data.

2. The processing system of claim 1 , wherein the second processing element further comprises:

queue control circuitry configured to:

receive a message from the first processing system element, wherein the message includes a queue address for one of the set of messaging queues,

provide data associated with the message to the one of the set of messaging queues specified by the queue address, and

add the queue address to the delegate queue to indicate the one of the set of messaging queues is storing data.

3. The processing system of claim 2 wherein the queue control circuitry is further configured to:

schedule a thread that is waiting for the data in response to a receive instruction being executed.

4. The processing system of claim 2 , wherein the second processing element further comprises:

a processor configured to, upon execution of a receive instruction for the delegate queue:

determine whether there is data in the delegate queue;

if there is data in the delegate queue,

read the queue address from the delegate queue; and

store the queue address in a processor register for subsequent use by other instructions.

5. The processing system of claim 4 wherein the processor is further configured to:

upon execution of the receive instruction for the delegate queue;

if there is no data in the delegate queue,

deschedule a thread associated with the receive instruction, and

re-schedule the thread associated with the receive instruction when there is data in the delegate queue.

6. The processing system of claim 2 , wherein the second processing element further comprises:

a processor configured to:

determine whether there is data in the delegate queue;

if there is data in the delegate queue,

determine whether a next highest priority messaging queue of the set of messaging queues has the data;

if the data is in the next highest priority messaging queue,

execute a receive instruction for the next highest priority messaging queue to transfer the data to the processor.

7. The processing system of claim 6 wherein the processor is further configured to:

select another next highest priority messaging queue of the set of messaging queues;

determine whether there is data in the delegate queue;

if there is data in the delegate queue,

determine whether the other next highest priority messaging queue of the set of messaging queues has the data;

if the data is in the other next highest priority messaging queue,

execute a receive instruction for the other next highest priority messaging queue to transfer the data to the processor.

8. The processing system of claim 2 , further comprising:

a timer coupled to the queue control circuitry, wherein the queue control circuitry is configured to include a timeout indicator in the set of messaging queues.

9. A processing system element comprising:

a processor;

messaging queue circuitry coupled to the processor, wherein the messaging queue circuitry includes:

queue control circuitry;

a plurality of messaging queues coupled to the queue control circuitry;

a delegate queue associated with the plurality of messaging queues and coupled to the queue control circuitry;

wherein the queue control circuitry is configured to:

receive a message including a queue address;

store the message in one of the plurality of messaging queues specified by the queue address; and

store the queue address in the delegate queue.

10. The processing system of claim 9 , wherein the queue control circuitry is further configured to:

determine whether there is a delegate queue associated with the plurality of messaging queues before storing the queue address in the delegate queue.

11. The system of claim 9 wherein the queue control circuitry is further configured to:

store the queue address in the delegate queue if the delegate queue is empty.

12. The system of claim 9 wherein the processing system element is further configured to:

reschedule execution of a thread that is waiting for data in the message once the queue address is stored in the delegate queue.

13. The system of claim 9 wherein the processor is configured to:

execute a receive instruction for the delegate queue;

determine whether there is data in the delegate queue;

if there is data in the delegate queue:

read the queue address of the one of the plurality of messaging queues; and

execute a receive instruction to transfer the message from the one of the plurality of messaging queues to the processor.

14. The system of claim 9 wherein the processor is configured to:

execute a receive instruction for the delegate queue;

determine whether there is data in the delegate queue;

if there is data in the delegate queue:

determine whether a next highest priority messaging queue of the plurality of messaging queues has the data;

if the data is in the next highest priority messaging queue,

execute a second receive instruction for the next highest priority messaging queue to transfer the data to the processor.

15. A method of passing messages between elements in a processing system comprising:

associating a set of messaging queues with a delegate queue for each of the elements in the processing system;

executing a receive instruction for the delegate queue for one of the elements;

when there is data in the delegate queue for the one of the elements:

executing a second receive instruction for a selected one of the set of messaging queues for the one of the elements to transfer a message from the selected one of the set of messaging queues to the one of the elements based on the data in the delegate queue.

16. The method of claim 15 further comprising:

storing an address of the selected one of the set of messaging queues in the delegate queue for the one of the elements as the data.

17. The method of claim 15 further comprising:

when there is data for more than one of the set of messaging queues in the delegate queue for the one of the elements, choosing a highest priority one of the set of messaging queues as the selected one of the set of messaging queues.

18. The method of claim 15 further comprising:

when there is no data in the delegate queue for the one of the elements:

descheduling a thread being executed;

rescheduling the thread when there is data in the delegate queue.

19. The method of claim 15 further comprising:

storing the message in the selected one of the messaging queues when the message is received.

20. The method of claim 15 further comprising:

receiving a message from another one of the elements in the one of the elements;

storing the message in the selected one of the set of messaging queues for the one of the elements; and

storing an address in the message in the delegate queue as the data, wherein the address identifies the one of the set of messaging queues for the one of the elements.

Assignments (17)