Thru-silicon-via structures
Stress generation free thru-silicon-via structures with improved performance and reliability and methods of manufacture are provided. The method includes forming a first conductive diffusion barrier liner on an insulator layer within a thru-silicon-via of a wafer material. The method further includes forming a stress absorption layer on the first conductive diffusion barrier. The method further includes forming a second conductive diffusion barrier on the stress absorption layer. The method further includes forming a copper plate on the second conductive diffusion barrier.
1. A structure comprising:
a thru-silicon-via in a wafer;
an insulator material lining the thru-silicon-via;
a floating diffusion barrier liner lining the insulator material;
a stress absorption layer on the floating diffusion barrier liner;
a diffusion barrier liner lining the stress absorption insulator layer;
a copper plate on the diffusion barrier liner; and
a capping material on a planarized surface of wafer and covering the insulator material, floating diffusion barrier liner, stress absorption insulator layer, diffusion barrier liner, and copper plate,
wherein the floating diffusion barrier liner is Ta or TaN,
wherein the insulator material completely lines a sidewall of the thru-silicon-via,
wherein the floating diffusion barrier liner is in direct contact and completely lines the insulator material within the thru-silicon-via,
wherein the stress absorption layer is an insulator material,
wherein the stress absorption layer directly contacts the floating diffusion barrier liner, and
wherein the diffusion barrier liner is directly contacting the stress absorption insulator layer.
2. The structure of claim 1 , further comprising an airgap in the thru-silicon-via.
3. The structure of claim 2 , wherein the airgap is between a top portion of the stress absorption layer, the capping material and the floating diffusion barrier liner.
4. The structure of claim 3 , wherein the capping material is SiN or SiCN.