IP Library Granted Patent US 9,355,993
Granted Patent B2
US 9,355,993 · App. 14/791,287 · Granted May 31, 2016

Integrated circuit system with debonding adhesive and method of manufacture thereof

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Quick Facts
Patent No.
US 9,355,993
App. No.
14/791,287
Granted
May 31, 2016
Kind
B2
Abstract

A system and method of manufacture of an integrated circuit system includes: a die having a via, the die having a top side and a bottom side; a top interconnect mounted to the via at the top side; an interconnect pillar mounted to the via at the bottom side; a device interconnect mounted to the interconnect pillar; and a base adhesive covering the interconnect pillar and the device interconnect.

Claims (40)

1. A method of manufacture of an integrated circuit system comprising:

providing a wafer having a via, the wafer having a top side and a bottom side;

mounting a top interconnect to the via at the top side;

mounting an interconnect pillar to the via at the bottom side;

attaching a device interconnect to the interconnect pillar;

forming a base adhesive covering the interconnect pillar and the device interconnect includes forming the base adhesive having a gelation point of 220 degrees Celsius; and

forming a die by singulating the wafer.

2. The method as claimed in claim 1 further comprising mounting a release adhesive to the base adhesive.

3. The method as claimed in claim 1 wherein forming the base adhesive includes forming the base adhesive having an inorganic filler material and an organic filler material.

4. The method as claimed in claim 1 wherein mounting the interconnect pillar includes mounting the interconnect pillar with a width greater than the width of the via.

5. A method of manufacture of an integrated circuit system comprising:

providing a wafer having a through-silicon via, the wafer having a top side and a bottom side;

mounting a top interconnect to the through-silicon via at the top side;

mounting an interconnect pillar to the through-silicon via at the bottom side;

attaching a device interconnect to the interconnect pillar;

forming a base adhesive covering the interconnect pillar and the device interconnect includes the base adhesive of silicon dioxide; and

forming a die by singulating the wafer.

6. The method as claimed in claim 5 wherein forming the base adhesive includes forming the base adhesive having a non-conductive paste resin having a curing temperature below 100 degrees Celsius.

7. The method as claimed in claim 5 wherein:

forming the base adhesive includes forming a non-conductive film resin covering the interconnect pillar and the device interconnect; and

further comprising:

mounting a release adhesive directly attached to the non-conductive film resin.

8. The method as claimed in claim 5 wherein forming the base adhesive includes the base adhesive of aluminum oxide.

9. An integrated circuit system comprising:

a die having a via, the die having a top side and a bottom side;

a top interconnect mounted to the via at the top side;

an interconnect pillar mounted to the via at the bottom side;

a device interconnect mounted to the interconnect pillar; and

a base adhesive, with a gelation point of 220 degrees Celsius, covering the interconnect pillar and the device interconnect.

10. The system as claimed in claim 9 further comprising a release adhesive mounted to the base adhesive.

11. The system as claimed in claim 9 wherein the base adhesive includes an inorganic filler material and an organic filler material.

12. The system as claimed in claim 9 wherein a width of the interconnect pillar is greater than the width of the via.

13. The system as claimed in claim 9 wherein the via is a through-silicon via.

14. The system as claimed in claim 13 wherein the base adhesive is a non-conductive paste resin having a curing temperature below 100 degrees Celsius.

15. The system as claimed in claim 13 wherein:

the base adhesive is a non-conductive film resin; and

further comprising:

a release adhesive directly attached to the non-conductive film resin.

16. The system as claimed in claim 13 wherein the base adhesive includes silicon dioxide.

17. The system as claimed in claim 13 wherein the base adhesive includes aluminum oxide.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2019
From: STATS CHIPPAC PTE. LTD.
To: JCET SEMICONDUCTOR (SHAOXING) CO., LTD.
Reel/Frame 051365/0680 →
CHANGE OF NAME Recorded Jul 27, 2016
From: STATS CHIPPAC LTD.
To: STATS CHIPPAC PTE. LTD.
Reel/Frame 039492/0956 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 26, 2016
From: CHOI, WON KYOUNG; MARIMUTHU, PANDI CHELVAM
To: STATS CHIPPAC LTD.
Reel/Frame 039262/0808 →