Granted Patent B2

US 10,366,002 · App. 14/822,351 · Granted Jul 30, 2019

Abstract

Claims (43)

1. A method for destaging cached data, the method comprising:

caching data corresponding to write requests pertaining to a backing store, the data written to cache storage as dirty cache data, the cache storage comprising an ordered log maintained on a nonvolatile storage medium; and

performing destage operations to destage cache to the backing store, wherein performing a destage operation comprises:

determining a destage metric for the cache storage, the destage metric corresponding to an amount of dirty cache data within the cache storage;

using a first criterion to select data from the cache storage for the destage operation in response to the destage metric exceeding a threshold, the first criterion corresponding to a sequential backing store address order; and

using a second criterion, different from the first criterion, to select the data from the cache storage for the destage operation in response to the destage metric failing to exceed the threshold, the second criterion corresponding to a log order.

2. The method of claim 1 , wherein determining the destage metric comprises maintaining a tally of the amount of dirty cache data currently stored within the cache storage.

3. The method of claim 1 , wherein performing the destage operations further comprises:

adjusting a destaging rate of the destage operations based on the destage metric.

4. The method of claim 1 , wherein:

the first criterion corresponds to a sequential backing store address order, such that data are selected from the cache storage based on backing store addresses associated with the data.

5. The method of claim 4 , wherein selecting data using the first criterion comprises traversing a mapping structure that maps backing store addresses to locations on physical storage media of the nonvolatile storage medium and selecting a destage data range such that members of the data range have contiguous and sequential backing store addresses.

6. The method of claim 4 , wherein:

each backing store address directly maps to a logical address of a logical address space associated with the nonvolatile storage medium; and

logical addresses of the cache storage are independent of physical storage media addresses of the nonvolatile storage medium.

7. The method of claim 1 , wherein a destage rate for destage operations using the first criterion is higher than a destage rate for destage operations using the second criterion.

8. The method of claim 1 , further comprising preventing destaging of data within a predefined distance of an append point of the ordered log of the nonvolatile solid-state cache.

9. The method of claim 1 , wherein determining the destage metric comprises determining a difference between an actual amount of dirty cache data within the cache storage and a target amount of dirty cache data.

10. The method of claim 1 , wherein:

the second criterion corresponds to a log order; and

selecting data using the second criterion comprises selecting data within one of a plurality of regions of the ordered log, the regions ordered in the log order.

11. The method of claim 10 , further comprising:

destaging data from a designated region of the ordered log; and

re-ordering data of the designated region to a backing store address order.

12. The method of claim 1 , wherein the ordered log comprises multiple append points for writing cached data, the multiple append points comprising at least one append point for writing dirty cache data and at least one append point for writing clean cache data, the clean cache data comprising cache data that is stored in the backing store.

13. An apparatus, comprising:

means for sending write requests pertaining to a backing store to a storage controller, the storage controller configured to cache data associated with the write requests in a log, the log comprising a sequential, log-based structure stored within a nonvolatile solid-state storage device;

means for determining an amount of data cached within the nonvolatile solid-state storage device that has not been destaged to the backing store;

means for using a sequential backing store address order for the destaging when the determined amount exceeds a threshold; and

means for using a log order for the destaging when the determined amount does not exceed the threshold.

14. The apparatus of claim 13 , wherein the threshold defines a target amount of dirty write data to cache within the nonvolatile solid-state storage device.

15. The apparatus of claim 13 , further comprising means for determining the amount of data cached within the nonvolatile solid-state storage device that has not been destaged to the backing store.

16. The apparatus of claim 13 , wherein the means for sending, the means for determining, the means for using a sequential backing store address order, and the means for using a log order comprise a device driver executing on a host computer system.

17. A system, comprising:

a cache comprising a log maintained within a nonvolatile solid-state storage device, the log comprising a sequential, log-based structure;

a backing store;

a cache controller configured to admit dirty write data into the cache in response to write requests pertaining to the backing store, the dirty write data appended to the log maintained within the nonvolatile solid-state storage device; and

a destage module configured to destage dirty write data from the cache to the backing store, by:

determining a destage pressure on the cache, the determined destage pressure corresponding to an amount of dirty write data cached within the log;

destaging dirty write data from the cache according to a sequential backing store address ordering of the dirty write data within the cache in response to the determined destage pressure satisfying a threshold; and

destaging dirty write data from the cache according to a log ordering of the dirty write data within the cache in response to the determined destage pressure failing to exceed the threshold.

18. The system of claim 17 , wherein the cache controller is further configured to receive at least a portion of the dirty write data from the nonvolatile solid-state storage device in the sequential backing store address order and to destage the received dirty write data to the backing store in the sequential backing store address order.

19. The system of claim 17 , further comprising a host computer system comprising a processor, wherein the cache controller and comprises a device driver executing on the processor of the host computer system.

Assignments (7)