IP Library Granted Patent US 9,472,426
Granted Patent B2
US 9,472,426 · App. 14/841,721 · Granted Oct 18, 2016

Packaging substrate and method for manufacturing same

Inventor: Wei-Shuo Su (Taoyuan, TW)
Assignee: Zhen Ding Technology Co., Ltd.
H01L21/4853H01L21/4828H01L21/4857H01L21/6835H01L21/76879H01L23/49822H01L2221/68318H01L2221/68345H01L2221/68377H01L2924/0002
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Quick Facts
Patent No.
US 9,472,426
App. No.
14/841,721
Granted
Oct 18, 2016
Kind
B2
Abstract

A method for manufacturing a packaging substrate includes: patterning a first photo-resisting layer having first openings on a copper foil layer to expose portions of the copper foil layer; patterning a removable second photo-resisting layer having second openings on the first photo-resisting layer to expose the first openings; filling copper into the first and second openings to form base portions and a first wiring layer; orderly forming a first dielectric layer and a second wiring layer on the first wiring layer; patterning a removable third photo-resisting layer comprising covering portions opposite to the base portions on the copper foil layer; and etching the copper foil layer to form protruding portions connected to and corresponding to the base portions to define a copper pillar bump, a size of the copper pillar bump gradually increasing from the protruding portions to the base portions.

Claims (26)

1. A method for manufacturing a packaging substrate, comprising:

patterning a first photo-resisting layer on a copper foil layer, the first photo-resisting layer defining a plurality of first openings to expose portions of the copper foil layer;

patterning a second photo-resisting layer on the first photo-resisting layer, the patterned second photo-resisting layer defining a plurality of second openings exposing the first openings;

filling copper into the first openings and the second openings, with base portions formed in the first openings and a first wiring layer in the second openings;

removing the second photo-resisting layer;

orderly forming a first dielectric layer and a second wiring layer on the first wiring layer;

patterning a third photo-resisting layer on the copper foil layer, the third photo-resisting layer facing away from the first photo-resisting layer, the third photo-resisting layer comprising a plurality of covering portions opposite to the base portions, and a size of each covering portion being less than a size of the corresponding base portion;

etching the copper foil layer to form a plurality of protruding portions connected to the base portions, each of the protruding portions spatially corresponding to a respective one of the base portions, each pair of base portion and protruding portion forming a copper pillar bump, a size of the copper pillar bump gradually increasing from the protruding portions to the base portions; and

removing the third photo-resisting layer.

2. The method of claim 1 , wherein after the first photo-resisting layer is formed on the copper foil layer and before the second photo-resisting layer is formed on the first photo-resisting layer, a first conductive layer is formed on exposed surfaces of the first photo-resisting layer and the copper foil layer, the second photo-resisting layer is formed on the first conductive layer.

3. The method of claim 2 , wherein after the second photo-resisting layer is removed and before the first dielectric layer is formed on the first wiring layer, the first conductive layer covered by the second photo-resisting layer is removed.

4. The method of claim 1 , wherein after the first dielectric layer and the second wiring layer are orderly formed on the first wiring layer, the second dielectric layer and the third wiring layer are orderly formed on the second wiring layer.

5. The method of claim 4 , wherein after the second dielectric layer and the third wiring layer are orderly formed on the second wiring layer, a solder masking layer is formed on the third wiring layer, parts of the third wiring layer exposing from the solder masking layer server as solder pads.

6. The method of claim 1 , wherein after the third photo-resisting layer is removed, the first photo-resisting layer is removed.

7. A method for manufacturing a packaging substrate, comprising:

attaching two copper foil layers on two opposite sides of a supporting plate;

patterning a first photo-resisting layer on each of the copper foil layers, the first photo-resisting layer defining a plurality of first openings to expose portions of each copper foil layer;

patterning a second photo-resisting layer on the first photo-resisting layer, the patterned second photo-resisting layer defining a plurality of second openings exposing the first openings;

filling the first openings and the second openings with copper, with base portions formed in the first openings and a first wiring layer in the second openings;

removing the second photo-resisting layer;

orderly forming a first dielectric layer and a second wiring layer on the first wiring layer to obtain a multilayer substrate, the multilayer substrate comprising the copper foil layer, the first photo-resisting layer, the first wiring layer, the first dielectric layer, and the second wiring layer;

peeling the multilayer substrate off from the supporting plate;

patterning a third photo-resisting layer on the copper foil layer, the third photo-resisting layer facing away from the first photo-resisting layer, the third photo-resisting layer comprising a plurality of covering portions opposite to the base portions, and a size of each covering portion being less than a size of the corresponding base portion;

etching the copper foil layer to form a plurality of protruding portions connected to the base portion, each of the protruding portions spatially corresponding to a respective one of the base portions, each pair of base portion and protruding portion forming a copper pillar bump, a size of the copper pillar bump gradually increasing from the protruding portions to the base portions; and

removing the third photo-resisting layer.

8. The method of claim 7 , wherein after the third photo-resisting layer is removed, the first photo-resisting layer is removed.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2023
From: QI DING TECHNOLOGY QINHUANGDAO CO., LTD.; ZHEN DING TECHNOLOGY CO., LTD.
To: LEADING INTERCONNECT SEMICONDUCTOR TECHNOLOGY QINHUANGDAO CO., LTD.; ZHEN DING TECHNOLOGY CO., LTD.
Reel/Frame 064899/0050 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2016
From: ZHEN DING TECHNOLOGY CO., LTD.
To: QI DING TECHNOLOGY QINHUANGDAO CO., LTD.; ZHEN DING TECHNOLOGY CO., LTD.
Reel/Frame 039822/0559 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2015
From: SU, WEI-SHUO
To: ZHEN DING TECHNOLOGY CO., LTD.
Reel/Frame 036463/0090 →
Priority Claims (1)
CN 2013 1 0230281 · Jun 11, 2013 · national
Continuity (2)
Division 14140461 · Dec 24, 2013
Related Publication 20150371873A1 · Dec 24, 2015