IP Library Granted Patent US 10,235,057
Granted Patent B2
US 10,235,057 · App. 14/846,568 · Granted Mar 19, 2019

Operating parameters for flash memory devices

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Quick Facts
Patent No.
US 10,235,057
App. No.
14/846,568
Granted
Mar 19, 2019
Kind
B2
Abstract

A machine-implemented method for managing a flash storage system includes determining a projected life value for each of a plurality of flash memory devices in the flash storage system, wherein the projected life value for at least one of the plurality of flash memory devices is higher than the projected life value of at least another one of the plurality of flash memory devices. The method also includes determining operating parameters for each of the plurality of flash memory devices based on the respective projected life values for the plurality of flash memory devices. The method also includes configuring the plurality of flash memory devices based on the determined operating parameters.

Claims (41)

1. A machine-implemented method for managing a flash storage system, comprising:

determining a projected life value for each of a plurality of flash memory devices in the flash storage system, wherein the projected life value for at least one of the plurality of flash memory devices is higher than the projected life value of at least another one of the plurality of flash memory devices, wherein the projected life value for each of the plurality of flash memory devices is based on a number of voltage pulses applied at a maximum voltage controllable by the plurality of flash memory devices for cells of a respective test flash memory block in each of the plurality of flash memory devices to reach a saturation point;

determining an average projected life value based on the projected life value for each of the plurality of flash memory devices in the flash storage system;

determining operating parameters for each of the plurality of flash memory devices based on a comparison of the average projected life value and the respective projected life values for the plurality of flash memory devices; and

configuring the plurality of flash memory devices based on the determined operating parameters.

2. The machine-implemented method for managing a flash storage system according to claim 1 , wherein the operating parameters for the at least one of the plurality of memory devices are different from the operating parameters for the at least another one of the plurality of flash memory devices.

3. The machine-implemented method for managing a flash storage system according to claim 2 , wherein the difference in the operating parameters corresponds to a difference between the projected life value for the at least one of the plurality of memory devices and the projected life value of the at least another one of the plurality of flash memory devices.

4. The machine-implemented method for managing a flash storage system according to claim 1 , wherein the operating parameters comprise erase operation parameters for erasing data units in the plurality of flash memory devices, and

wherein the erase operation parameters comprise at least one of initial pulse value, incremental pulse value, or pulse width.

5. The machine-implemented method for managing a flash storage system according to claim 1 , wherein the operating parameters comprise write operation parameters for writing data to data units in the plurality of flash memory devices, and

wherein the write operation parameters comprise at least one of initial pulse value, incremental pulse value, or pulse width.

6. The machine-implemented method for managing a flash storage system according to claim 1 , wherein the projected life value for a respective flash memory device is associated with each flash memory block on the respective flash memory device, and

wherein the projected life value is a number of program-erase cycles expected to be performed on flash memory blocks in the corresponding flash memory device before failure of the flash memory blocks in the corresponding flash memory device.

7. A flash storage system, comprising:

a plurality of flash memory devices, each of the plurality of flash memory devices having a projected life value, wherein at least two of the plurality of flash memory devices have different projected life values; and

a controller configured to:

receive a command for a data operation;

determine operating parameters for one of the plurality of flash memory devices having a flash memory block associated with the data operation, wherein the operating parameters are determined based on a comparison of the respective projected life value for the one of the plurality of flash memory devices and an average projected life value determined based on the projected life values of the plurality of flash memory devices, wherein the projected life value for the one of the plurality of flash memory devices is based on a number of voltage pulses applied at a maximum voltage controllable by the one of the plurality of flash memory devices for cells of a test flash memory block in the one of the plurality of flash memory devices to reach a saturation point;

configure the one of the plurality of flash memory devices based on the determined operating parameters; and

execute the data operation on the one of the plurality of flash memory devices.

8. The flash storage system according to claim 7 , wherein each of the plurality of flash memory devices has operating parameters, wherein the at least two of the plurality of flash memory devices have different operating parameters and wherein the at least two of the plurality of flash memory devices include the one of the plurality of flash memory devices.

9. The flash storage system according to claim 8 , wherein the difference in the operating parameters corresponds to a difference between the respective projected life values for the at least two of the plurality of memory devices.

10. The flash storage system according to claim 7 , wherein the operating parameters comprise erase operation parameters for erasing data units in the plurality of flash memory devices, and

wherein the erase operation parameters comprise at least one of initial pulse value, incremental pulse value, or pulse width.

11. The flash storage system according to claim 7 , wherein the operating parameters comprise write operation parameters for writing data to data units in the plurality of flash memory devices, and

wherein the write operation parameters comprise at least one of initial pulse value, incremental pulse value, or pulse width.

12. The flash storage system according to claim 7 , wherein the projected life value for a respective flash memory device is associated with each flash memory block on the respective flash memory device, and

wherein the projected life value is a number of program-erase cycles expected to be performed on flash memory blocks in the corresponding flash memory device before failure of the flash memory blocks in the corresponding flash memory device.

13. A non-transitory machine-readable media encoded with executable instructions which, when executed by a processor, cause the processor to perform operations comprising:

receiving a command for a data operation;

determining operating parameters for one of a plurality of flash memory devices having a flash memory block associated with the data operation, wherein each of the plurality of flash memory devices has a projected life value, wherein at least two of the plurality of flash memory devices have different projected life values, wherein the operating parameters are determined based on a comparison of the respective projected life value for the one of the plurality of flash memory devices and an average projected life value determined based on the projected life values of the plurality of flash memory devices, and wherein the projected life value for the one of the plurality of flash memory devices is based on a number of voltage pulses applied at a maximum voltage controllable by the one of the plurality of flash memory devices for cells of a test flash memory block in the one of the plurality of flash memory devices to reach a saturation point;

configuring the one of the plurality of flash memory devices based on the determined operating parameters; and

executing the data operation on the one of the plurality of flash memory devices.

14. The non-transitory machine-readable media according to claim 13 , wherein each of the plurality of flash memory devices has operating parameters, wherein the at least two of the plurality of flash memory devices have different operating parameters and wherein the at least two of the plurality of flash memory devices include the one of the plurality of flash memory devices.

15. The non-transitory machine-readable media according to claim 14 , wherein the difference in the operating parameters corresponds to a difference between the respective projected life values for the at least two of the plurality of memory devices.

16. The non-transitory machine-readable media according to claim 13 , wherein the operating parameters comprise erase operation parameters for erasing data units in the plurality of flash memory devices, and

wherein the erase operation parameters comprise at least one of initial pulse value, incremental pulse value, or pulse width.

17. The non-transitory machine-readable media according to claim 13 , wherein the operating parameters comprise write operation parameters for writing data to data units in the plurality of flash memory devices, and

wherein the write operation parameters comprise at least one of initial pulse value, incremental pulse value, or pulse width.

18. The non-transitory machine-readable media according to claim 13 , wherein the projected life value for a respective flash memory device is associated with each flash memory block on the respective flash memory device, and

wherein the projected life value is a number of program-erase cycles expected to be performed on flash memory blocks in the corresponding flash memory device before failure of the flash memory blocks in the corresponding flash memory device.

Assignments (12)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT SERIAL NO 15/025,946 PREVIOUSLY RECORDED AT REEL: 040831 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2017
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043973/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040831/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2015
From: ROTHBERG, MICHAEL STEPHEN
To: HGST NETHERLANDS B.V.
Reel/Frame 036639/0254 →