IP Library Granted Patent US 9,875,025
Granted Patent B2
US 9,875,025 · App. 14/853,920 · Granted Jan 23, 2018

System and method for performing data retention in solid-state memory using an LRU list

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Quick Facts
Patent No.
US 9,875,025
App. No.
14/853,920
Granted
Jan 23, 2018
Kind
B2
Abstract

Systems and methods for retaining data are disclosed in which refresh copy operations are performed on data stored in non-volatile solid-state memory. A controller may be configured to maintain a list of physical memory locations, the list sorted by a least recently used criterion. The controller may select a first entry from a top of the list and perform a refresh operation to copy data stored in a current physical memory location associated with the first entry to a new physical memory location, and may remove the first entry from the top of the list and add a new entry associated with the new physical memory location to a bottom of the list. The controller may repeat the select, perform, remove and add steps for a plurality of entries in the list, and the steps may be timed such that all refresh operations are performed for all of the plurality of entries within a set period of time.

Claims (69)

1. A storage subsystem, comprising:

a non-volatile solid-state memory array; and

a controller configured to maintain a list of physical memory locations storing data in the non-volatile solid-state memory array, wherein the list is sorted by a least recently used criterion, and wherein the controller is further configured to execute one or more refresh cycles to:

select a first entry from a top of the list for processing;

perform a refresh operation comprising copying data stored in a current physical memory location associated with the first entry to a new physical memory location;

remove the first entry from the top of the list;

add a new entry associated with the new physical memory location to a bottom of the list; and

repeat the select, perform, remove and add steps for a plurality of entries in the list, wherein the select, perform, remove and add steps are timed such that all refresh operations are performed for all of the plurality of entries in the list within a set period of time.

2. The storage subsystem according to claim 1 , wherein the controller is further configured to:

maintain a head pointer to reference the top of the list, wherein the head pointer is updated to reference a next entry in the list when the first entry is removed from the top of the list; and

maintain a tail pointer to reference a bottom entry of the list, wherein the plurality of entries is bounded in the list by a head entry referenced by the head pointer and the bottom entry referenced by the tail pointer.

3. The storage subsystem according to claim 2 , wherein the controller is further configured to add the new entry associated with the new physical memory location to the list below the bottom entry of the list.

4. The storage subsystem according to claim 3 , wherein the controller is further configured to:

reset the head pointer to reference an entry on the list below a current bottom entry of the list; and

reset the tail pointer to reference an entry at the bottom of the list,

wherein the head and tail pointers are reset upon completing the select, perform, remove and add steps for the plurality of entries in the list.

5. The storage subsystem according to claim 1 , wherein the controller is further configured to:

add an entry associated with a physical memory location corresponding to a write command to the bottom of the list; and

remove an entry associated with a physical memory location corresponding to an erase command from the list.

6. The storage subsystem according to claim 1 , wherein the controller is further configured to:

receive a timer trigger; and

initiate a next iteration of the select, perform, remove and add steps in response to the received timer trigger,

wherein the timer is set according to a refresh cycle based on the set period of time and the number of entries in the plurality of entries.

7. A method, comprising:

maintaining a list of physical memory locations storing data in a non-volatile solid-state memory array, wherein the list is sorted by a least recently used criterion; and

executing one or more refresh cycles comprising:

selecting a first entry from a top of the list for processing;

performing a refresh operation comprising copying data stored in a current physical memory location associated with the first entry to a new physical memory location;

removing the first entry from the top of the list;

adding a new entry associated with the new physical memory location to a bottom of the list; and

repeating the selecting, performing, removing and adding steps for a plurality of entries in the list, wherein the selecting, performing, removing and adding steps are timed such that all refresh operations are performed for all of the plurality of entries in the list within a set period of time.

8. The method of claim 7 , further comprising:

maintaining a head pointer to reference the top of the list, wherein the head pointer is updated to reference a next entry in the list when the first entry is removed from the top of the list; and

maintaining a tail pointer to reference a bottom entry of the list, wherein the plurality of entries is bounded in the list by a head entry referenced by the head pointer and the bottom entry referenced by the tail pointer.

9. The method of claim 8 , further comprising adding the new entry associated with the new physical memory location to the list below the bottom entry of the list.

10. The method of claim 9 , further comprising:

resetting the head pointer to reference an entry on the list below a current bottom entry of the list; and

resetting the tail pointer to reference an entry at the bottom of the list,

wherein the head and tail pointers are reset upon completing the selecting, performing, removing and adding steps for the plurality of entries in the list.

11. The method of claim 7 , further comprising:

adding an entry associated with a physical memory location corresponding to a write command to the bottom of the list; and

removing an entry associated with a physical memory location corresponding to an erase command from the list.

12. The method of claim 7 , further comprising:

receiving a timer trigger; and

initiating a next iteration of the selecting, performing, removing and adding steps in response to the received timer trigger,

wherein the timer is set according to a refresh cycle based on the set period of time and the number of entries in the plurality of entries.

13. A non-transitory machine readable storage medium storing instructions executable by a processor to perform operations comprising:

maintaining a list of physical memory locations storing data in a non-volatile solid-state memory array, wherein the list is sorted by a least recently used criterion; and

executing one or more refresh cycles comprising:

selecting a first entry from a top of the list for processing;

performing a refresh operation comprising copying data stored in a current physical memory location associated with the first entry to a new physical memory location;

removing the first entry from the top of the list;

adding a new entry associated with the new physical memory location to a bottom of the list; and

repeating the selecting, performing, removing and adding steps for a plurality of entries in the list, wherein the selecting, performing, removing and adding steps are timed such that all refresh operations are performed for all of the plurality of entries in the list within a set period of time.

14. The non-transitory machine readable storage medium of claim 13 , wherein the operations further comprise:

maintaining a head pointer to reference the top of the list, wherein the head pointer is updated to reference a next entry in the list when the first entry is removed from the top of the list; and

maintaining a tail pointer to reference a bottom entry of the list, wherein the plurality of entries is bounded in the list by a head entry referenced by the head pointer and the bottom entry referenced by the tail pointer.

15. The non-transitory machine readable storage medium of claim 14 , wherein the operations further comprise adding the new entry associated with the new physical memory location to the list below the bottom entry of the list.

16. The non-transitory machine readable storage medium of claim 15 , wherein the operations further comprise:

resetting the head pointer to reference an entry on the list below a current bottom entry of the list; and

resetting the tail pointer to reference an entry at the bottom of the list,

wherein the head and tail pointers are reset upon completing the selecting, performing, removing and adding steps for the plurality of entries in the list.

17. The non-transitory machine readable storage medium of claim 13 , wherein the operations further comprise:

adding an entry associated with a physical memory location corresponding to a write command to the bottom of the list; and

removing an entry associated with a physical memory location corresponding to an erase command from the list.

18. The non-transitory machine readable storage medium of claim 13 , wherein the operations further comprise:

receiving a timer trigger; and

initiating a next iteration of the selecting, performing, removing and adding steps in response to the received timer trigger,

wherein the timer is set according to a refresh cycle based on the set period of time and the number of entries in the plurality of entries.

Assignments (11)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 039389 FRAME 0699 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0553 →
RELEASE OF SECURITY INTEREST Recorded Aug 16, 2016
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 039444/0802 →
SECURITY AGREEMENT Recorded Jul 19, 2016
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 039389/0699 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 15, 2015
From: SYU, MEI-MAN L.; CALL, MATTHEW; KANG, HO-FAN; PHAN, LAN D.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 036571/0880 →