Granted Patent B2

US 9,836,350 · App. 14/871,096 · Granted Dec 5, 2017

Abstract

Claims (60)

1. An error correction method of a data storage system having non-volatile memory, comprising:

writing data to a first location in the non-volatile memory from a block of user data stored in DRAM;

verifying the data written to the first location and identifying errors;

re-writing the block of user data to a second location in the non-volatile memory upon determining the number of identified errors exceed a threshold value;

verifying the data written to the second location and identifying errors;

comparing the data written to the first location and the data written to the second location and identifying all discrepancy bits in the comparison;

applying joint decoding;

building a joint parity check matrix for the data written to the first location and the data written to the second location;

building a code word matrix with the comparison, wherein the code matrix includes variables for the identified discrepancy bits;

determining if a resultant of the joint parity check matrix and the code word matrix is invertible; and

solving simultaneous equation to determine values for the identified discrepancy bits.

2. The error correction method for non-volatile memory of claim 1 , wherein the second location does not overwrite the first location.

3. The error correction method for non-volatile memory of claim 1 , wherein the threshold value is one.

4. The error correction method for non-volatile memory of claim 1 , further comprising:

determining the number of identified errors from the write to the second location exceeds a second threshold value;

re-writing the block of user data to a third location;

verifying the data written to the third location and identifying errors;

building a second joint parity check matrix for the data written to the first location, the data written to the second location, and the data written to the third location; and

determining if the second joint parity check matrix is invertible.

5. The error correction method for non-volatile memory of claim 4 , wherein the second threshold value is one.

6. A non-transitory computer-readable storage medium storing a program, which, when executed by a processor of a data storage system performs an operation for correcting errors in non-volatile memory, the operation comprising:

writing data to a first location in the non-volatile memory from a block of user data stored in DRAM;

verifying the data written to the first location and identifying errors;

re-writing the block of user data to a second location in the non-volatile memory upon determining the number of identified errors exceed a threshold value;

verifying the data written to the second location and identifying errors;

comparing the data written to the first location and the data written to the second location and identifying all discrepancy bits in the comparison;

applying joint decoding;

building a joint parity check matrix for the data written to the first location and the data written to the second location;

building a code word matrix with the comparison, wherein the code matrix includes variables for the identified discrepancy bits;

determining if a resultant of the joint parity check matrix and the code word matrix is invertible; and

solving simultaneous equation to determine values for the identified discrepancy bits.

7. The computer-readable storage medium of claim 6 , wherein the second location does not overwrite the first location.

8. The computer-readable storage medium of claim 6 , wherein the threshold value is one.

9. The computer-readable storage medium of claim 6 , further comprising:

determining the number of identified errors from the write to the second location exceeds a second threshold value;

re-writing the block of user data to a third location;

verifying the data written to the third location and identifying errors;

building a second joint parity check matrix for the data written to the first location, the data written to the second location, and the data written to the third location; and

determining if the second joint parity check matrix is invertible.

10. The computer-readable storage medium of claim 9 , wherein the second threshold value is one.

11. A data storage system, comprising:

a processor; and

a non-volatile memory, wherein the memory includes an application program configured to perform an operation for correcting errors in the non-volatile memory, the operation comprising:

writing data to a first location from a block of user data stored in DRAM;

verifying the data written to the first location and identifying errors;

re-writing the block of user data to a second location upon determining the number of identified errors exceed a threshold value;

verifying the data written to the second location and identifying errors;

comparing the data written to the first location and the data written to the second location and identifying all discrepancy bits in the comparison;

applying joint decoding;

building a joint parity check matrix for the data written to the first location and the data written to the second location;

building a code word matrix with the comparison, wherein the code matrix includes variables for the identified discrepancy bits;

determining if a resultant of the joint parity check matrix and the code word matrix is invertible; and

solving simultaneous equation to determine values for the identified discrepancy bits.

12. The system of claim 11 , wherein the second location does not overwrite the first location.

13. The system of claim 11 , further comprising:

re-writing the block of user data to a third location;

verifying the data written to the third location and identifying errors;

building a second joint parity check matrix for the data written to the first location, the data written to the second location, and the data written to the third location; and

determining if the second joint parity check matrix is invertible.

14. The system of claim 11 , wherein the threshold value is one.

Assignments (13)