Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling
Semiconductor devices and methods for making the same includes conformally forming a first spacer on a plurality of fins. A second spacer is conformally formed on the first spacer, the second spacer being formed from a different material from the first spacer. The plurality of fins are etched below a bottom level of the first spacer to form a fin cavity. Material from the first spacer is removed to expand the fin cavity. Fin material is grown directly on the etched plurality of fins to fill the fin cavity.
1. A method for forming a semiconductor device, comprising:
conformally forming a first spacer on a plurality of fins;
conformally forming a second spacer on the first spacer, the second spacer being formed from a different material from the first spacer;
filling gaps between the fins with a support material;
polishing the first spacer and second spacer to remove material from the first spacer and the second spacer that is directly over the plurality of fins to expose a top surface of the plurality of fins;
etching away all of the support material after polishing the first spacer and second spacer;
etching the plurality of fins below a bottom level of the first spacer to form a fin cavity;
removing material from the first spacer to expand the fin cavity; and
growing fin material directly on the etched plurality of fins to fill the fin cavity.
2. The method of claim 1 , wherein removing material from the first and second spacer comprises removing only material that is above the plurality of fins, such that material between the fins is not removed.
3. The method of claim 1 , further comprising forming a dielectric layer between and around the plurality of fins before forming the first spacer to electrically isolate the plurality of fins.
4. The method of claim 3 , wherein etching the plurality of fins comprises etching the plurality of fins below a top level of the dielectric layer.
5. The method of claim 1 , wherein growing fin material is limited such that the fins do not merge.
6. The method of claim 1 , further comprising forming the plurality of fins on a substrate.
7. The method of claim 1 , further comprising forming a gate over a channel region of the fins, such that spacers and grown fin material are formed only on source and drain regions of the fins.
8. The method of claim 1 , wherein the first spacer is formed directly on the plurality of fins.
9. The method of claim 1 , wherein the second spacer is formed directly on the first spacer.
10. The method of claim 1 , wherein the first spacer and the second spacer are polished before etching the plurality of fins.
11. The method of claim 1 , wherein filling gaps between the fins comprises spin-on deposition of silicon dioxide and wherein etching away the support material comprises an etch using dilute hydrogen fluoride.
12. A method for forming a semiconductor device, comprising:
conformally forming a first spacer directly on a plurality of fins;
conformally forming a second spacer directly on the first spacer, the second spacer being formed from a different material from the first spacer;
filling gaps between the fins with a support material;
polishing the first spacer and second spacer to remove material from the first and second spacer that is directly over the plurality of fins to expose a top surface of the plurality of fins;
etching away all of the support material after polishing the first spacer and second spacer;
etching the plurality of fins below a bottom level of the first spacer to form a fin cavity;
removing material from the first spacer to expand the fin cavity; and
growing fin material directly on the etched plurality of fins to fill the fin cavity, such that the fin material does not merge.
13. The method of claim 12 , wherein removing material from the first and second spacer comprises removing only material that is above the plurality of fins, such that material between the fins is not removed.
14. The method of claim 12 , further comprising forming a dielectric layer between and around the plurality of fins before forming the first spacer to electrically isolate the plurality of fins.
15. The method of claim 14 , wherein etching the plurality of fins comprises etching the plurality of fins below a top level of the dielectric layer.
16. The method of claim 12 , further comprising forming the plurality of fins on a substrate.
17. The method of claim 12 , further comprising forming a gate over a channel region of the fins, such that spacers and grown fin material are formed only on source and drain regions of the fins.