End of life prediction based on memory wear
View Patent ↗A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.
1. A method for calculating system life of a memory device with blocks, the method comprising:
calculating a wear for individual ones of the blocks;
determining a number of spare blocks from the blocks that are required for operation, wherein the number of spare blocks required for operation is X;
identifying, based on the calculated wear for each of the blocks, the Xth most worn block; and
predicting the system life based on the calculated wear for the Xth most worn block.
2. The method of claim 1 wherein the Xth most worn block is the block with the X highest calculated wear.
3. The method of claim 2 wherein when the blocks are ordered from highest to lowest wear, the Xth block in that ordering is determined.
4. The method of claim 1 wherein the calculated wear comprises a wear remaining that is based on a time remaining after which every spare block is utilized.
5. The method of claim 4 wherein the wear remaining is calculated for the Xth most worn block.
6. The method of claim 1 wherein the calculating a wear comprises:
measuring, periodically, voltage distribution of states for cells in the blocks;
calculating a width of the voltage distribution over a certain number of cycles; and
quantizing wear based on changes to the width of the voltage distribution.
7. The method of claim 6 wherein the quantizing comprises a calculation of a standard deviation of the voltage distribution.
8. The method of claim 6 wherein the quantizing comprises a calculation of skewness of the voltage distribution.
9. The method of claim 8 wherein the skewness is calculated using Pearson's shape parameter.
10. The method of claim 1 wherein the calculating a wear comprises:
periodically determining a cell voltage distribution of cells in the blocks during run time;
measuring changes in the cell voltage distribution from the periodic determinations; and
calculating the wear of the cells based on the measured changes in the cell voltage distribution wherein the measured changes comprises a shape change of the cell voltage distribution.
11. The method of claim 1 wherein calculating a wear is based on a bit error rate analysis.
12. The method of claim 11 wherein the bit error rate analysis comprises:
periodically determining a bit error rate of cells in the storage device during run time;
measuring changes in the bit error rate from the periodic determinations; and
calculating the wear based on the measured changes in the bit error rate.
13. A method for memory device lifetime analysis, the method comprising:
performing the following in a storage module of the memory device:
calculating a wear for each block in a population of blocks;
determining a number of spare blocks required for operation, wherein the memory device does not accept new data when the spare blocks are depleted;
identifying, based on the calculated wear, a number of blocks with a calculated wear corresponding to the number of spare blocks required for operation; and
predicting the lifetime based on the calculated wear for the identified block.
14. The method of claim 13 wherein the number of spare blocks required for operation is X and wherein the identified block is the Xth most worn block.
15. The method of claim 13 wherein the predicting the lifetime comprises:
determining a wear remaining value based on the calculated wear for the identified block, wherein the lifetime corresponds with the wear remaining for the identified block.
16. The method of claim 15 wherein the wear remaining is based on a time remaining after which every spare block is utilized.
17. The method of claim 13 wherein the calculating of the wear is based on a change in shape of a voltage distribution of voltage values for cells in the population of blocks.
18. The method of claim 17 wherein the calculating of the wear comprises:
periodically determining the voltage distribution of the cells in the population of blocks;
measuring changes in the voltage distribution from the periodic determinations; and
calculating the wear of the cells based on a change in the shape of the voltage distribution.
19. The method of claim 17 wherein the calculating of the wear comprises:
periodically determining a bit error rate of cells in the memory device during run time;
measuring changes in the bit error rate from the periodic determinations; and
calculating the wear based on the measured changes in the bit error rate.
20. The method of claim 13 wherein the memory device transitions to a read-only mode when the spare blocks are depleted.