Dynamic programming adjustments based on memory wear, health, and endurance
View Patent ↗A memory system or flash card may include a mechanism for memory cell measurement and analysis that independently measures/predicts memory wear/endurance, data retention (DR), read disturb, and/or remaining margin. These effects may be independently quantified by analyzing the state distributions of the individual voltage levels of the cells. In particular, a histogram of cell voltage distributions of the memory cells can be analyzed to identify signatures for certain effects (e.g. wear, DR, read disturb, margin, etc.). Those measurements may be used for block cycling, data loss prediction, or adjustments to memory parameters. Pre-emptive action at the appropriate time based on the measurements may lead to improved memory management and data management. That action may include calculating the remaining useful life of data stored in memory, cycling blocks, predicting data loss, trade-off or dynamic adjustments of memory parameters.
1. A method comprising:
calculating, periodically, a data retention value for each block in a storage module;
calculating a data retention rate of change based on changes to the periodic calculations of the data retention values over time for each block, wherein the calculating comprises an analysis of a voltage distribution of each block, wherein the data retention value is identified based on a shift in location of the voltage distribution;
estimating an endurance of a particular block based on the data retention rate of change for the particular block;
detecting outlier blocks based on the estimation of the endurance, wherein the outlier blocks comprise blocks below a threshold for the endurance; and
mapping the outlier blocks.
2. The method of claim 1 wherein the mapping comprises a listing of blocks that should be avoided, wherein the outlier blocks in the mapping comprise bad blocks.
3. The method of claim 1 further comprising:
dynamically adjusting trim parameters for the storage module based on the estimated endurance.
4. The method of claim 1 wherein the threshold comprises a certain percentage of the blocks.
5. The method of claim 1 wherein the mapping comprises a listing of blocks that are cycled to reduce usage of those blocks.
6. The method of claim 1 wherein the data retention rate of change comprises a rate that the location of the voltage distribution shifts.
7. A method comprising:
calculating a wear for chunks in a memory;
calculating a wear rate of change based on changes to the calculations of the wear over time for each of the chunk calculations, wherein the calculating comprises an analysis of a voltage distribution of each chunk, wherein the wear is identified based on a change in shape of the voltage distribution and the wear rate of change comprises a rate that the shape of the voltage distribution changes;
estimating an endurance of a particular chunk based on the wear rate of change for the particular chunk;
detecting outlier chunks based on the estimation of the endurance, wherein the outlier chunks comprise chunks below a threshold for the endurance; and
modifying usage of the outlier chunks.
8. The method of claim 7 wherein the mapping comprises a listing of chunks that should be avoided wherein the outlier chunks in the mapping comprise bad chunks.
9. The method of claim 7 further comprising:
dynamically adjusting trim parameters for the storage module based on the estimated endurance.
10. The method of claim 7 wherein the threshold comprises a certain percentage of the chunks.
11. The method of claim 7 wherein the modifying usage comprises mapping the detected outlier chunks into a listing of chunks that are cycled to reduce usage of those chunks.
12. A storage device comprising:
a non-volatile memory comprising memory blocks for data storage;
a controller coupled with the non-volatile memory for programming the memory blocks, wherein the controller is configured for:
measuring a data retention for each of the memory blocks with an analysis of a voltage distribution of each block, wherein the data retention is identified based on a shift in location of the voltage distribution;
calculating a rate of change of the data retention based on changes to the measurements of the data retention over time for each of the memory blocks;
estimating an endurance of at least one of the memory blocks based on the rate of change of the data retention for the at least one of the memory blocks; and
detecting outlier blocks from the memory blocks based on the estimating of the endurance, wherein the outlier blocks comprise the memory blocks that are below a threshold for the endurance as estimated.
13. The storage device of claim 12 further comprising mapping the outlier blocks into a listing of blocks that should be avoided.
14. The storage device of claim 13 wherein the outlier blocks in the mapping comprise bad blocks.
15. The storage device of claim 12 wherein the threshold comprises a certain percentage of the blocks.
16. The storage device of claim 12 wherein the mapping comprises a listing of blocks that are cycled to reduce usage of those blocks.
17. The storage device of claim 12 wherein the rate of change of the data retention comprises a rate that the location of the voltage distribution shifts.