IP Library Granted Patent US 9,886,196
Granted Patent B2
US 9,886,196 · App. 14/992,353 · Granted Feb 6, 2018

Method and system for efficient common processing in memory device controllers

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,886,196
App. No.
14/992,353
Granted
Feb 6, 2018
Kind
B2
Abstract

Embodiments of the present invention are operable to efficiently schedule memory device commands, such as flash memory device commands, while taking into account the interdependencies of processing such commands. As such embodiments of the present invention order commands to make sure that data is written and read from memory devices in a coherent fashion using command groups. Commands within such command groups are scheduled concurrently or in parallel. In this fashion, embodiments of the present invention promote efficient execution of memory device commands while maintaining any required arbitrary ordering requirements.

Claims (46)

1. A method of executing I/O commands, said method comprising:

receiving a first I/O command expressed in a first protocol for executing a first set of operations using a plurality of memory devices;

receiving a second I/O command expressed in a second protocol different from the first protocol for executing a second set of operations using said plurality of memory devices;

normalizing said first and second I/O commands into a common format by identifying common parameters to generate a plurality of normalized commands; and

grouping said plurality of normalized commands for executing said first and second set of operations on said plurality of memory devices.

2. The method of executing I/O commands as described in claim 1 , wherein said normalizing further comprises:

extracting a first set of I/O parameters related to said first I/O command and a second set of I/O parameters related to said second I/O command; and

generating said plurality of normalized commands using said first and second sets of I/O parameters and a template.

3. The method of executing I/O commands as described in claim 1 , further comprising:

generating a respective data structure for storing each of said first and second sets of operations separately.

4. The method of executing I/O commands as described in claim 1 , wherein said grouping further comprises:

grouping said plurality of normalized commands based on a predetermined criteria.

5. The method of executing I/O commands as described in claim 4 , wherein said predetermined criteria comprises an operation type.

6. The method of executing I/O commands as described in claim 1 , further comprising:

executing said plurality of normalized commands in parallel.

7. The method of executing I/O commands as described in claim 1 , wherein said different protocols comprises:

a vendor-independent standard; and

a vendor-specific standard.

8. A system for executing I/O commands, said system comprising:

a receiving module configured to receive a first I/O command expressed in a first protocol for executing a first set of operations using a plurality of memory devices and receiving a second I/O command expressed in a second protocol different from the first protocol for executing a second set of operations using said plurality of memory devices;

a normalization module configured to normalize said first and second I/O commands into a common format by identifying common parameters to generate a plurality of normalized commands; and

a grouping module configured to group said plurality of normalized commands for executing said first and second set of operations on said plurality of memory devices.

9. The system for executing I/O commands as described in claim 8 , wherein said normalization module is further operable to extract a first set of I/O parameters related to said first I/O command and a second set of I/O parameters related to said second I/O command and generate said plurality of normalized commands using said first and second sets of I/O parameters and a template.

10. The system for executing I/O commands as described in claim 8 , further comprising:

a data structure generation module configured to generate a respective data structure for storing each of said first and second sets of operations separately.

11. The system for executing I/O commands as described in claim 10 , wherein said grouping module is further operable to group said plurality of normalized commands based on a predetermined criteria.

12. The system for executing I/O commands as described in claim 11 , wherein said predetermined criteria comprises an operation type.

13. The system for executing I/O commands as described in claim 8 , further comprising:

an execution module configured to execute said plurality of normalized commands in parallel.

14. The system for executing I/O commands as described in claim 8 , wherein said different protocols comprises:

a vendor-independent standard; and

a vendor-specific standard.

15. A method of executing I/O commands, said method comprising:

receiving a first I/O command expressed in a first protocol for executing a first set of operations using a plurality of memory devices;

receiving a second I/O command expressed in a second protocol different from the first protocol for executing a second set of operations using said plurality of memory devices;

normalizing said first and second I/O commands into a common format by identifying common parameters to generate a plurality of normalized commands; and

grouping said plurality of normalized commands for execution on said plurality of memory devices, wherein said plurality of normalized commands are stored in separate data structures based on a predetermined criteria.

16. The method of executing I/O commands as described in claim 15 , wherein said normalizing further comprises:

extracting a first set of I/O parameters related to said first I/O command and a second set of I/O parameters related to said second I/O command; and

generating said plurality of normalized commands using said first and second sets of I/O parameters and a template.

17. The method of executing I/O commands as described in claim 15 , wherein said different protocols comprises:

a vendor-independent standard; and

a vendor-specific standard.

18. The method of executing I/O commands as described in claim 17 , wherein said predetermined criteria comprises an operation type.

19. The method of executing I/O commands as described in claim 18 , wherein said operation type is a read or write operation.

20. The method of executing I/O commands as described in claim 18 , wherein said operation type is a data integrity check operation.

Assignments (12)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT SERIAL NO 15/025,946 PREVIOUSLY RECORDED AT REEL: 040831 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2017
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043973/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040831/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2016
From: RUPANAGUNTA, SRIRAM; SINGHAI, ASHISH; SHARMA, SANDEEP; SADASIVAM, SRIKANT; SKANDAKUMARAN, KRISHANTH; MOUSSA, GEROGE; MISHRA, RAJENDRA PRASAD; OKIN, KENNETH ALAN
To: HGST NETHERLANDS B.V.
Reel/Frame 037452/0895 →