Granted Patent B2

US 10,216,419 · App. 14/993,531 · Granted Feb 26, 2019

Abstract

Claims (61)

1. A method comprising:

receiving at a data storage unit, by a graphics processing unit (GPU) of a computing system, from a host processor of the computing system, first information instructing the GPU to perform direct communication with the data storage unit of the computing system wherein the data storage unit has controller with a synergistic processing unit to perform scatter and gather operations, encryption, decryption and direct memory access operations originating from the data storage unit;

responsive to receiving the first information, initiating, by the GPU, a direct communication channel, bypassing the host processor and system memory, with the data storage unit, and allocating a data buffer within a GPU memory to buffer positions of a second information during an exchange between the GPU and the data storage unit, and send an indication of a memory location of the data buffer; and

executing, by the GPU, one or more operations that rely on the direct communication channel to exchange the second information directly with the data storage unit, wherein the data storage unit is configured to interface with the GPU through a GPU-data storage unit interface and through the host processor, wherein the data are configured to be transferred through the data buffer of the GPU memory and the data storage unit without using the host processor.

2. The method of claim 1 , wherein executing the one or more operations comprises at least one of:

requesting, by the GPU, from the data storage unit, using the direct communication channel, and as part of a read operation performed between the GPU and the data storage unit, the second information; or

transferring, from the GPU, to the data storage unit, using the direct communication channel, and as part of a write operation performed between the GPU and the data storage unit, the second information, wherein the second information comprises a portion of data stored at the data storage unit.

3. The method of claim 2 , wherein executing the one or more operations further comprises:

responsive to requesting the second information, receiving, by the GPU, from the data storage unit, using the direct communication channel, the portion of the data stored at the data storage unit; and

performing, by the GPU, using the portion of the data, one or more functions.

4. The method of claim 3 , wherein the portion of the data stored at the data storage unit is a first portion of data and executing the one or more operations further comprises:

determining, by the GPU, third information in response to performing the one or more functions; and

transferring, from the GPU, to the data storage unit, using the direct communication channel, and as part of a subsequent write operation performed between the GPU and the data storage unit, the third information to be stored as a second portion of the data stored at the data storage unit.

5. A method comprising:

receiving, by a solid state drive (SSD) of a computing system, from a host processor of a computing system, first information instructing the SSD to perform direct communication with a graphics processing unit (GPU) of the computing system, wherein the first information includes an indication of a memory location of a data buffer allocated within a GPU memory that is reserved by the GPU for directly exchanging data with the SSD, wherein the solid state drive has a controller with a synergistic processing unit configured to perform encryption, decryption and direct memory access operations originating from the SSD;

initiating, by the SSD, based on the first information, a direct communication channel with the GPU to perform direct communication between the GPU and the SSD that bypasses the host processor and system memory, wherein the initiating further comprises: registering, by the SSD, with a direct memory access (DMA) unit of the SSD, the memory location of the data buffer associated with the GPU for future information exchanges with the GPU; and

exchanging, by the SSD, using the direct communication channel, second information with the GPU, wherein the SSD is configured to interface with the GPU through a GPU-SSD interface and the host processor, wherein the data are configured to be transferred through the buffer of the GPU memory and the SSD without using the host processor.

6. The method of claim 5 further comprising:

receiving, by the SSD, from the GPU, using the direct communication channel, as part of a write operation performed between the GPU and the SSD, a request to store the second information as a portion of data stored at the SSD;

determining, by the SSD, based on the request, a storage location for the portion of the data within addressable memory of the SSD;

transferring, by the SSD, from the GPU, using the direct communication channel, the portion of the data directly from the data buffer allocated within the memory of the GPU and to the storage location within the addressable memory of the SSD.

7. A computing system, comprising:

a data bus;

a host processor communicatively coupled to the data bus;

a graphics processing unit (GPU) communicatively coupled to the data bus; and

a data storage unit communicatively coupled to the data bus, wherein:

the data storage unit is configured to store data with a controller with a synergistic processor unit configured to perform scatter and gather operations, encryption, decryption and direct memory access operations originating from the data storage unit; and

the GPU is configured to:

receive, via the data bus, from the host processor, first information instructing the GPU to perform direct communication, over the data bus, with the data storage unit;

responsive to receiving the first information, initiate a direct communication channel, over the data bus, with the data storage unit to communicate directly with the data storage unit as a dedicated data path of the data bus between the GPU and the data storage unit that bypasses the host processor and system memory; and

execute one or more operations that rely on the direct communication channel to exchange second information directly with the data storage unit, wherein the data storage unit is configured to interface with the GPU through a GPU-data storage interface and the host processor, wherein the data are configured to be transferred through a buffer of a GPU memory and the data storage unit without using the host processor and the data storage unit is configured to perform direct memory access operations;

wherein the GPU is configured to initiate the direct communication channel by:

allocating the buffer of the GPU memory for buffering portions of the second information during an exchange between the GPU and the data storage unit; and

sending, the data storage unit, via the host processor, an indication of a memory location of the buffer.

8. The system of claim 7 , wherein the data storage unit comprises a direct memory access (DMA) unit configured to register the memory location as being associated with the GPU for future information exchanges with the GPU.

9. The system of claim 7 , wherein the GPU is further configured to execute the one or more operations by:

requesting, from the data storage unit, using the direct communication channel, and as part of a read operation performed between the GPU and the data storage unit, the second information;

receiving, from the data storage unit, using the direct communication channel, as the second information, a first portion of the data stored at the data storage unit;

performing, using the first portion of the data, one or more functions;

determining results information in response to performing the one or more functions; and

transferring, to the data storage unit, using the direct communication channel, and as part of a subsequent write operation performed between the GPU and the data storage unit, the results information to be stored as a second portion of the data stored at the data storage unit.

10. The system of claim 9 wherein the data storage unit is further configured to:

receive, from the GPU, using the direct communication channel, as part of the read operation performed between the GPU and the data storage unit, the second information;

retrieve, based on the second information and using the controller of the data storage unit, the first portion of the data by at least:

determining, based on the second information, a storage location of the first portion of the data; and

transfer, using the direct communication channel, the first portion of the data directly to a data buffer allocated within a memory of the GPU.

11. The system of claim 7 , wherein the data storage unit is a solid state drive (SSD).

12. The system of claim 7 , wherein the system comprises a single computing device.

13. A computing system, comprising:

a data bus;

a host processor communicatively coupled to the data bus;

a graphics processing unit (GPU) communicatively coupled to the data bus; and

a data storage unit communicatively coupled to the data bus, wherein:

the data storage unit is configured to store data with a controller with a synergistic processor unit configured to perform scatter and gather operations, encryption, decryption and direct memory access operations originating from the data storage unit; and

the GPU is configured to:

receive, via the data bus, from the host processor, first information instructing the GPU to perform direct communication, over the data bus, with the data storage unit;

responsive to receiving the first information, initiate a direct communication channel, over the data bus, with the data storage unit to communicate directly with the data storage unit as a dedicated data path of the data bus between the GPU and the data storage unit that bypasses the host processor and system memory; and

execute one or more operations that rely on the direct communication channel to exchange second information directly with the data storage unit, wherein the data storage unit is configured to interface with the GPU through a GPU-data storage interface and through the host processor, wherein the data is configured to be transferred through a buffer of a GPU memory and the data storage unit without using the host processor and the data storage unit is configured to perform direct memory access operations;

wherein the data storage unit is configured to initiate the direct communication channel by:

receiving, from the GPU, via the host processor, based on a third information, an indication of a location of the buffer of the GPU memory; and

registering the buffer location as being associated with the GPU for future information exchanges with the GPU.

Assignments (9)