Method and apparatus to generate zero content over garbage data when encryption parameters are changed
View Patent ↗A memory device including at least one memory location for storing information representing data written using a first encryption/decryption method, and a read channel using a second encryption/decryption method for reading and decrypting information as written. The memory device also includes an apparatus that prevents the reading of the at least one memory location using the second encryption/decryption method, in response to an indication that the at least one memory location was written using the first encryption/decryption method. In another embodiment, a reading of all zeroes is returned in response to an indication of another encryption/decryption method.
1. A memory device comprising:
at least one physical memory location comprising at least one physical block address configured to store information representing data written using a first encryption/decryption method, wherein the information representing data is in a block;
a read channel configured to read and decrypt information using a second encryption/decryption method;
an apparatus configured to, in response to an indication that the information was written to the at least one physical memory location using the first encryption/decryption method, prevent the read channel from reading the at least one physical memory location using the second encryption/decryption method by at least:
associating a flag with the at least one physical memory location; and
returning zero content for the at least one physical memory location in response to the read channel using the second encryption/decryption method;
and an indirection system comprising:
at least one logical block address;
a database configured to map the at least one logical block address to the at least one physical block address; and
an apparatus configured to indicate the at least one logical block address inaccessible in response to the read channel using the second encryption/decryption method.
2. The memory device of claim 1 , wherein the apparatus configured to prevent the reading of the at least one physical memory location comprises a device for writing zeroes to the at least one physical memory location written in response to the read channel using the second encryption/decryption method.
3. The memory device of claim 1 , wherein a second encryption parameter associated with the second encryption/decryption method differs from a first encryption parameter associated with the first encryption/decryption method.
4. The memory device of claim 1 , wherein a second encryption range parameter associated with the second encryption/decryption method differs from a first encryption range parameter associated with the first encryption/decryption method.
5. The memory device of claim 1 , wherein a second encryption key parameter of the second encryption/decryption method differs from a first encryption key parameter of the first encryption/decryption method.
6. A storage apparatus comprising:
a storage medium including a plurality of physical memory locations;
a write channel configured to write information representing data to the plurality of physical memory locations;
a read channel configured to read information representing data from the plurality of physical memory locations; a controller configured to control the write channel to write information to the plurality of physical memory locations and the read channel to read information representing data from the plurality of physical memory locations;
an indirection system comprising: a set of logical block addresses;
a set of physical block addresses that correspond to the plurality of physical memory locations in the storage medium of the storage apparatus;
a map that associates a respective logical block addresses of the set of logical block addresses to at least one respective physical block address, the map also including a respective flag for each respective physical block address indicating an encryption/decryption method used to write data to and read data from the respective physical block address,
wherein the controller is configured to:
in response to an indication that the information was written to at least one physical memory location of the plurality of physical memory locations using a first encryption/decryption method, prevent the read channel from reading the at least one memory location using a second encryption/decryption method; and
in response to the read channel using the second encryption/decryption method return a set of zeroes.
7. The storage apparatus of claim 6 , wherein the controller is configured to cause the write channel to write the respective physical block address with zeroes in response to a change in the encryption/decryption method from the first encryption/decryption method to the second encryption/decryption method.
8. The storage apparatus of claim 6 , wherein the controller is configured to remove a pointer in the map between the respective logical block address and the respective physical block address in response to an indication of a change in the encryption/decryption method from the first encryption/decryption method to the second encryption/decryption method.
9. The storage apparatus of claim 6 , wherein the controller is configured to generate a flag indicating information at a respective physical block address is invalid in response to an indication of a change in the encryption/decryption method from the first encryption/decryption method to the second encryption/decryption method.
10. A method comprising:
causing, by a controller of a storage apparatus, a write channel to write information representing data to at least one physical memory location comprising at least one physical block address using a first encryption/decryption method, wherein the information representing data is in a block;
causing, by the controller, an indirection system to map at least one logical block address to the at least one physical block address;
detecting, by the controller, a change in an encryption/decryption scheme used to read and write data from the first encryption/decryption method to a second encryption/decryption method; and
in response to detecting the change in encryption/decryption scheme, preventing, by the controller, a read channel from reading the at least one physical memory location using the second encryption/decryption method by at least:
associating a flag with the at least one physical memory location; and
causing, by the controller, a logical block address to return zero content in response to the read channel using the second encryption/decryption method; and
in response to the read channel using the second encryption/decryption method, indicating that the at least one logical block address is inaccessible.
11. The method of claim 10 , further comprising, causing, by the controller, the write channel to write zeroes using the second encryption/decryption method to the at least one physical block address.
12. The method of claim 11 , further comprising:
removing, by the controller, a pointer from the at least one logical block address to the at least one physical block address in response to detecting the change in encryption/decryption scheme from the first encryption/decryption method to the second encryption/decryption method.
13. The method of claim 11 , wherein:
respective logical block addresses of the at least one logical block address are associated with respective physical block addresses of the at least one physical block address written with the first encryption/decryption method,
the at least logical block address is mapped to the at least one physical block address in a map; and
the map comprises at least one flag indicating that information representing data at a respective logical block address is invalid when the information representing data written to the respective physical block address associated with the respective logical block address is written using the first encryption/decryption method.