IP Library Granted Patent US 9,898,341
Granted Patent B2
US 9,898,341 · App. 15/052,946 · Granted Feb 20, 2018

Adjustable priority ratios for multiple task queues

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Quick Facts
Patent No.
US 9,898,341
App. No.
15/052,946
Granted
Feb 20, 2018
Kind
B2
Abstract

In some examples, a method includes assigning, to each respective task queue of a plurality of task queues, a respective priority ratio based at least in part on a number of tasks in the respective task queue. The method further includes assigning, by a processor of a plurality of processors, respective tasks from the respective task queues to at least one processor of the plurality of processors in an order based at least in part on the respective priority ratio, wherein the respective priority ratio defines a relative frequency with which tasks from the respective task queue are assigned to the at leak one processor.

Claims (40)

1. A method comprising:

assigning, to each respective task queue of a plurality of task queues, a respective priority ratio based at least in part on a number of tasks in the respective task queue; and

assigning, by a processor of a plurality of processors, respective tasks from the respective task queues to at least one processor of the plurality of processors in an order based at least in part on the respective priority ratio, wherein the respective priority ratio defines a relative frequency with which tasks from the respective task queues are assigned to the at least one processor, wherein the respective priority ratio comprises a ratio of a number of tasks to execute to a number of tasks to skip, and wherein the respective priority ratio comprises a plurality of programmable priority ratio levels, wherein each programmable priority ratio level of the plurality of programmable priority ratio levels is associated with a range of queue depths that defines a frequency with which tasks from the respective task queue associated with the respective priority ratio are scheduled.

2. The method of claim 1 , wherein assigning respective tasks from the respective task queues to the at least one processor comprises:

progressing, by the processor, through tasks assigned to each respective task queue of the plurality of task queues in a predetermined interleaved order; and

determining, by the processor, whether to assign a task from each respective task queue to the at least one processor based at least in part on the respective priority ratio associated with the respective task queue.

3. The method of claim 1 , wherein assigning, to each respective task queue of the plurality of task queues, based at least in part on the number of tasks in the respective task queue, the respective priority ratio comprises:

assigning, to each respective task queue of the plurality of task queues, based at least in part on the number of tasks in the respective task queue and a type of task associated with the respective task queue, the respective priority ratio.

4. The method of claim 1 , wherein assigning, to each respective task queue of the plurality of task queues, based at least in part on the number of tasks in the respective task queue, the respective priority ratio comprises:

selecting, for each respective task queue, a priority ratio from a plurality of possible priority ratios assignable to the respective task queue, wherein each possible priority ratio of the plurality of possible priority ratios is associated with a respective range of numbers of tasks in the respective task queue.

5. The method of claim 1 , wherein the at least one processor is configured to handle tasks from any task queue of the plurality of task queues.

6. A system comprising:

a memory storing a plurality of task queues, wherein each task queue of the plurality of task queues is associated with a respective priority ratio that is based at least in part on a number of tasks in the respective task queue; and

a plurality of processors, wherein a first processor of the plurality of processors is configured to assign respective tasks from the respective task queues to at least one processor of the plurality of processors in an order based at least in part on the respective priority ratio, wherein the respective priority ratio defines a relative frequency with which tasks from the respective task queues are assigned to the at least one processor, wherein the respective priority ratio comprises a ratio of a number of tasks to execute to a number of tasks to skip, and wherein the respective priority ratio comprises a plurality of programmable priority ratio levels, wherein each programmable priority ratio level of the plurality of programmable priority ratio levels is associated with a range of queue depths that defines a frequency with which tasks from the respective task queue associated with the respective priority ratio are scheduled.

7. The system of claim 6 , wherein:

the first processor progresses through tasks assigned to each respective task queue of the plurality of task queues in a predetermined interleaved order; and

the first processor determines whether to assign a task from each respective task queue to the at least one processor based at least in part on the priority ratio associated with the respective task queue.

8. The system of claim 6 , wherein the respective priority ratio is based at least in part on the number of tasks in the respective task queue and a type of task associated with the respective task queue.

9. The system of claim 6 , wherein each respective task queue has a plurality of possible priority ratios associated with the respective task queue, and wherein each possible priority ratio of the plurality of possible priority ratios is associated with a respective range of numbers of tasks in the respective task queue.

10. The system of claim 6 , wherein the at least one processor is configured to handle tasks from any task queue of the plurality of task queues.

11. A system comprising:

means for assigning, to each respective task queue of a plurality of task queues, a respective priority ratio based at least in part on a number of tasks in the respective task queue; and

means for assigning respective tasks from the respective task queues to at least one processor of a plurality of processors in an order based at least in part on the respective priority ratio, wherein the respective priority ratio defines a relative frequency with which tasks from the respective task queues are assigned to the at least one processor, wherein the respective priority ratio comprises a ratio of a number of tasks to execute to a number of tasks to skip, and wherein the respective priority ratio comprises a plurality of programmable priority ratio levels, wherein each programmable priority ratio level of the plurality of programmable priority ratio levels is associated with a range of queue depths that defines a frequency with which tasks from the respective task queue associated with the respective priority ratio are scheduled.

12. The system of claim 11 , wherein the means for assigning respective tasks from the respective task queues to the at least one processor comprises:

means for progressing through tasks assigned to each respective task queue of the plurality of task queues in a predetermined interleaved order; and

means for determining whether to assign a task from each respective task queue to the at least one processor based at least in part on the priority ratio associated with the respective task queue.

13. The system of claim 11 , wherein the respective priority ratio is based at least in part on the number of tasks in the respective task queue and a type of task associated with the respective task queue.

14. The system of claim 11 , wherein each respective task queue has a plurality of possible priority ratios associated with the respective task queue, and wherein each possible priority ratio of the plurality of possible priority ratios is associated with a respective range of numbers of tasks in the respective task queue.

15. The system of claim 11 , wherein the at least one processor is configured to handle tasks from any task queue of the plurality of task queues.

16. A non-transitory computer-readable storage device comprising instructions that, when executed, configure one or more processors of a storage device to:

assign, to each respective task queue of a plurality of task queues, a respective priority ratio based at least in part on a number of tasks in the respective task queue; and

assign respective tasks from the respective task queues to at least one processor of a plurality of processors in an order based at least in part on the respective priority ratio, wherein the respective priority ratio defines a relative frequency with which tasks from the respective task queues are assigned to the at least one processor, wherein the respective priority ratio comprises a ratio of a number of tasks to execute to a number of tasks to skip, and wherein the respective priority ratio comprises a plurality of programmable priority ratio levels, wherein each programmable priority ratio level of the plurality of programmable priority ratio levels is associated with a range of queue depths that defines a frequency with which tasks from the respective task queue associated with the respective priority ratio are scheduled.

17. The non-transitory computer-readable storage device of claim 16 , wherein the instructions that, when executed, configure the one or more processors of a storage device to assign respective tasks from the respective task queues to at least one processor comprise:

instructions that, when executed, configure the one or more processors of a storage device to progress through tasks assigned to each respective task queue of the plurality of task queues in a predetermined interleaved order; and

instructions that, when executed, configure the one or more processors of a storage device to determine whether to assign a task from each respective task queue to the at least one processor based at least in part on the priority ratio associated with the respective task queue.

18. The non-transitory computer-readable storage device of claim 16 , wherein the instructions that, when executed, configure the one or more processors of a storage device to assign, to each respective task queue of the plurality of task queues, based at least in part on the number of tasks in the respective task queue, a respective priority ratio comprise:

instructions that, when executed, configure the one or more processors of a storage device to assign, to each respective task queue of the plurality of task queues, based at least in part on the number of tasks in the respective task queue and a type of task associated with the respective task queue, the respective priority ratio.

19. The non-transitory computer-readable storage device of claim 16 , wherein the instructions that, when executed, configure the one or more processors of a storage device to assign, to each respective task queue of the plurality of task queues, based at least in part on the number of tasks in the respective task queue, a respective priority ratio comprise:

instructions that, when executed, configure the one or more processors of a storage device to select, for each respective task queue, a priority ratio from a plurality of possible priority ratios assignable to the respective task queue, wherein each possible priority ratio of the plurality of possible priority ratios is associated with a respective range of numbers of tasks in the respective task queue.

20. The non-transitory computer-readable storage device of claim 16 , wherein the at least one processor is configured to handle tasks from any task queue of the plurality of task queues.

Assignments (12)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT SERIAL NO 15/025,946 PREVIOUSLY RECORDED AT REEL: 040831 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2017
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043973/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040831/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 25, 2016
From: CHANG, DAR-DER; HSIEH, HSING HENG; POTTER, CHARLES DOMINIC
To: HGST NETHERLANDS B.V.
Reel/Frame 037822/0173 →