IP Library Granted Patent US 10,157,004
Granted Patent B2
US 10,157,004 · App. 15/099,018 · Granted Dec 18, 2018

Storage system and method for recovering data corrupted in a host memory buffer

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Quick Facts
Patent No.
US 10,157,004
App. No.
15/099,018
Granted
Dec 18, 2018
Kind
B2
Abstract

A storage system and method for recovering data corrupted in a host memory buffer are provided. In one embodiment, a storage system is provided comprising a non-volatile memory and a controller in communication with the non-volatile memory. The controller is configured to receive a logical-to-physical map from a volatile memory of a host for storage in the storage system's non-volatile memory; determine if there is an error in an entry in the logical-to-physical map; in response to determining that there is no error in the logical-to-physical map, store the logical-to-physical map in the non-volatile memory; and in response to determining that there is an error in an entry in the logical-to-physical map, attempt to recover the entry from a location in the storage system before storing the logical-to-physical map in the non-volatile memory. Other embodiments are provided.

Claims (46)

1. A storage system comprising:

a volatile memory;

a non-volatile memory; and

a controller in communication with the non-volatile memory, wherein the controller is configured to:

send, to a host, at least a portion of a logical-to-physical map stored in the non-volatile memory;

send, to the host, an update to an entry in the at least a portion of the logical-to-physical map, wherein the update is protected by an error detection code;

receive, from the host, the update to the entry, wherein the update to the entry was stored in a memory in the host that is less reliable than the volatile memory of the storage system;

determine, using the error detection code, if there is an error in the received update to the entry;

in response to determining that there is no error in the received update to the entry, store the received update to the entry in the non-volatile memory in the storage system; and

in response to determining that there is an error in the received update to the entry:

attempt to recover the update to the entry from a log of changes made to the logical-to-physical map; and

in response to the attempt to recover the update to the entry from the log being successful, store the recovered update to the entry in the non-volatile memory in the storage system.

2. The storage system of claim 1 , wherein the controller is further configured to, in response to the attempt to recover the update to the entry from the log being unsuccessful, search open blocks in the non-volatile memory for information to recover the update to the entry.

3. The storage system of claim 1 , wherein the error detection code comprises cyclic redundancy check (CRC) bits.

4. The storage system of claim 1 , wherein the non-volatile memory comprises a three-dimensional memory array.

5. The storage system of claim 1 , wherein the storage system is embedded in the host.

6. The storage system of claim 1 , wherein the storage system is removably connected to the host.

7. A storage system comprising:

a volatile memory;

a non-volatile memory;

means for sending, to a host, at least a portion of a logical-to-physical map stored in the non-volatile memory;

means for sending, to the host, an update to an entry in the at least a portion of the logical-to-physical map, wherein the update is protected by an error detection code;

means for receiving, from the host, the update to the entry, wherein the update to the entry was stored in a memory in the host that is less reliable than the volatile memory of the storage system;

means for determining, using the error detection code, if there is an error in the received update to the entry;

means for, in response to determining that there is no error in the update to the entry, storing the update to the entry in the non-volatile memory in the storage system; and

means for, in response to determining that there is no error in the received update to the entry:

attempting to recover the update to the entry from a log of changes made to the logical-to-physical map; and

in response to the attempt to recover the update to the entry from the log being successful, storing the recovered update to the entry in the non-volatile memory in the storage system.

8. The storage system of claim 7 , wherein the non-volatile memory comprises a three-dimensional memory array.

9. The storage system of claim 7 , wherein the storage system is embedded in the host.

10. The storage system of claim 7 , wherein the storage system is removably connected to the host.

11. A method comprising:

performing the following in a controller in a storage system comprising a non-volatile memory and a volatile memory:

sending, to a host, at least a portion of a logical-to-physical map stored in the non-volatile memory;

sending, to the host, an update to an entry in the at least a portion of the logical-to-physical map, wherein the update is protected by an error detection code;

receiving, from the host, the update to the entry, wherein the update to the entry was stored in a memory in the host that is less reliable than the volatile memory of the storage system;

determine, using the error detection code, if there is an error in the received update to the entry;

in response to determining that there is no error in the received update to the entry, store the received update to the entry in the non-volatile memory in the storage system; and

in response to determining that there is an error in the update to the entry:

attempting to recover the update to the entry from a log of changes made to the logical-to-physical map; and

in response to the attempt to recover the update to the entry from the log being successful, storing the recovered update to the entry in the non-volatile memory in the storage system.

12. The method of claim 11 further comprising, in response to the attempt to recover the update to the entry from the log being unsuccessful, searching open blocks in the non-volatile memory for information to recover the update to the entry.

13. The method of claim 11 , wherein the error detection code comprises cyclic redundancy check (CRC) bits.

14. The method of claim 11 , wherein the non-volatile memory comprises a three-dimensional memory array.

15. The method of claim 11 , wherein the storage system is embedded in the host.

16. The method of claim 11 , wherein the storage system is removably connected to the host.

Assignments (5)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038812/0954 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2016
From: MICHAELI, ELIYAHU
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 038286/0401 →
Cited By (6)
US 12,189,536 US 12,271,266 US 12,298,853 US 12,306,717 US 12,321,236 US 12,399,782