Memory system
According to the embodiments, a memory system includes a nonvolatile semiconductor memory and a writing-loop-count monitoring unit that monitors a loop count of an applied voltage to the nonvolatile semiconductor memory required for data writing of the nonvolatile semiconductor memory as a writing loop count. Moreover, the memory system includes a management table for managing the writing loop count in block unit that is a unit of data erasing and a life managing unit that determines a degraded state of the nonvolatile semiconductor memory based on the management table.
1. A system comprising:
a semiconductor nonvolatile memory configured to store data;
a management unit; and
a control unit con figured to input a first voltage to a specific block of the semiconductor nonvolatile memory a plurality of times in response to a single write command and input a second voltage to a specific block of the semiconductor nonvolatile memory a plurality of times in response to a single erase command, wherein
the semiconductor nonvolatile memory includes:
a first area configured to store data from a host; and
a second area that includes blocks for at least one of management, replacement, and buffering,
the management unit is configured to determine, on the basis of first information or second information, degradation of a block in the second area, the first information being information regarding first processing, the first processing being performed in the data writing, the second information being information regarding second processing, the second processing being performed in the data erasing, and
when a number of blocks related to the degradation in the second area reaches a first threshold, the management unit causes a display device to display a warning.
2. The system according, to claim 1 , wherein
the management unit monitors a writing loop count of the first voltage or monitors an erasing loop count of the second voltage, and
the management unit counts, on the basis of the writing loop count or the erasing loop count, the number of blocks related to the degradation in the second area.
3. The system according to claim 2 , wherein
the first information is a number of blocks that have the writing loop count smaller than a second threshold, and
the second information is a number of blocks that have the erasing loop count larger than a third threshold.
4. The system according to claim 1 , wherein
the management unit monitors a writing loop count of the first voltage or monitors an erasing loop count of the second voltage, and
the management determines, on the basis of the writing loop count or the erasing loop count, degradation of the semiconductor nonvolatile memory.
5. The system according to claim 2 , wherein
the block includes a plurality of pages, the plurality of pages being units of the data writing and the data reading,
the first information is the writing loop count of a page that has a smallest writing loop count in the block, and
the second information is a number of blocks that have the erasing , loop count larger than a third threshold.
6. The system according to claim 1 , wherein in the data writing, the control unit inputs the first voltage to the semiconductor nonvolatile memory a plurality of times while the first voltage is gradually increased.
7. The system according to claim 1 , wherein
in the data erasing, the control unit inputs the second voltage to the semiconductor nonvolatile memory a plurality of times while the second voltage is gradually increased.
8. The system according to claim 1 , wherein
the semiconductor nonvolatile memory further includes a third area, the third area being configured to store management information of the second area, and
when a request is issued from the host, the management unit transmits, to the host, the management information of the second area.
9. The system according to claim 1 , wherein
after the first voltage is input, the control unit performs a verifying operation to check whether the data writing is performed normally, and
when the data writing is not performed normally, the control unit repeatedly performs increase of the first voltage and the verifying operation until the normal writing is performed or until a time-out.
10. The system according to claim 1 , wherein, after the second voltage is input, the control unit performs a verifying operation to check whether the data erasing is performed normally, and
when the data erasing is not performed normally, the control unit repeatedly performs increase of the second voltage and the verifying operation until the normal erasing is performed or until a time-out.
11. A system comprising:
a semiconductor nonvolatile memory configured to store data;
a management unit; and
a control unit configured to input a first voltage to a specific block of the semiconductor nonvolatile memory a plurality of times in response to a single write command and input a second voltage to a specific block of the semiconductor nonvolatile memory a plurality of times in response to a single erase command, wherein
the semiconductor nonvolatile memory includes:
a first area configured to store data from a host; and
a second area that includes blocks for at least one of management, replacement, and buffering,
the management unit is configured to determine, on the basis of first information or second information, degradation of a block in the second area, the first information being information regarding first processing, the first processing being performed in the data writing, the second information being information regarding second processing, the second processing being performed in the data erasing, and
when a number of blocks related to the degradation in the second area reaches a first threshold, the management unit registers information that is to be output to an external device.
12. The system according to claim 11 , wherein
the management unit monitors a w ting loop count of the first voltage or monitors an erasing loop count of the second voltage, and
the management unit counts, on the basis of the writing loop count or the erasing loop count, the number of blocks related to the degradation in the second area.
13. The system according to claim 12 , wherein
the first information is a number of blocks that have the writing loop count smaller than a second threshold, and
the second information is a number of blocks that have the erasing loop count larger than a third threshold.
14. The system according to claim 11 , wherein
the management unit monitors a writing loop count of the first voltage or monitors an erasing loop count of the second voltage, and
the management unit determines, on the basis of the writing loop count or the erasing loop count, degradation of the semiconductor nonvolatile memory.
15. The system according to claim 12 , wherein
the block includes a plurality of pages, the plurality of pages being units of the data writing and data reading,
the first information is the writing loop count of a page that has a smallest writing loop count in the block, and
the second information is a number of blocks that have the erasing loop count larger than a third threshold.
16. The system according to claim 11 , wherein
in the data writing, the control unit inputs the first voltage to the semiconductor nonvolatile memory a plurality of times while the first voltage is gradually increased.
17. The system according to claim 11 , wherein
in the data erasing, the control unit inputs the second voltage to the semiconductor nonvolatile memory a plurality of times while the second voltage is gradually increased.
18. The system according to claim 11 , wherein
the semiconductor nonvolatile memory further includes a third area, the third area being configured to store management information of the second area, and
when a request is issued from the host, the management unit transmits, to the host, the management information of the second area.
19. The system according to claim 11 , wherein
after the first voltage is input, the control unit performs a verifying operation to check whether the data writing is performed normally, and
when the data writing is not performed normally, the control unit repeatedly performs increase of the first voltage and the verifying operation until the normal writing is performed or until a time-out.
20. The system according to claim 11 , wherein
after the second voltage is input, the control unit performs a verifying operation to check whether the data erasing is performed normally, and
when the data erasing is not performed normally, the control unit repeatedly performs increase of the second voltage and the verifying operation until the normal erasing is performed or until a time-out.