IP Library › Granted Patent US 9,995,783
Granted Patent B2
US 9,995,783 · App. 15/195,131 · Granted Jun 12, 2018

Measurement apparatus and method

Inventor: Adrian Kiermasz (Bristol, GB)
Assignee: METRYX LIMITED
G01R31/2601G01N5/00G01N5/02G01N15/0893H01L22/12C30B1/00C30B7/00C30B23/00G01N1/00G01N2201/00G01N2203/00H01J49/26
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Quick Facts
Patent No.
US 9,995,783
App. No.
15/195,131
Granted
Jun 12, 2018
Kind
B2
Abstract

A method and apparatus for extracting the contents of voids and/or pores present in a semiconductor device to obtain information indicative of the nature of the voids and/or pores, e.g. to assist with metrology measurements. The method includes heating the semiconductor wafer to expel the contents of the voids and/or pores, collecting the expelled material in a collector, and measuring a consequential change in mass of the semiconductor wafer and/or the collector, to extract information indicative of the nature of the voids. This information may include information relating to the distribution of the voids and/or pores, and/or the sizes of the voids and/or pores, and/or the chemical contents of the voids and/or pores. The collector may include a condenser having a temperature-controlled surface (e.g. in thermal communication with a refrigeration unit) for condensing the expelled material.

Claims (23)

1. A semiconductor wafer metrology method comprising:

heating a semiconductor wafer to expel material contained in enclosed voids formed in or beneath a layer deposited on the semiconductor wafer;

collecting the expelled material in a collector; and

measuring a consequential change in mass of the semiconductor wafer and/or the collector, to extract information indicative of the nature of the enclosed voids wherein the collector is a condenser having a temperature-controlled surface for condensing the expelled material.

2. A method according to claim 1 , wherein heating the semiconductor wafer comprises applying heat to a surface of the semiconductor wafer opposite to a surface on which the layer is deposited.

3. A method according to claim 1 including positioning the temperature-controlled surface opposite to the surface of the semiconductor wafer on which the layer is deposited in order to collect the expelled material.

4. A method according to claim 1 , wherein the temperature-controlled surface of the condenser is partitioned into a plurality of condensing portions.

5. A semiconductor wafer metrology method comprising:

heating a semiconductor wafer to expel material contained in enclosed voids formed in or beneath a layer deposited on the semiconductor wafer;

collecting the expelled material in a collector; and

measuring a consequential change in mass of the semiconductor wafer and/or the collector, to extract information indicative of the nature of the enclosed voids;

wherein heating the semiconductor wafer comprises gradually increasing the temperature of the semiconductor wafer, and wherein measuring the consequential change in mass of the semiconductor wafer and/or the collector comprises performing a plurality of mass measurement during the increase in temperature to obtain the consequential change in mass of the semiconductor wafer and/or the collector as a function of the temperature of the semiconductor wafer.

6. A semiconductor wafer metrology method comprising:

heating a semiconductor wafer to expel material contained in enclosed voids formed in or beneath a layer deposited on the semiconductor wafer;

collecting the expelled material in a collector;

measuring a consequential change in mass of the semiconductor wafer and/or the collector, to extract information indicative of the nature of the enclosed voids; and

after collecting the expelled material in the collector, applying localized heating to each of a plurality of regions of the collector to expel the collected material in each region, and measuring a consequential change in mass of the collector to extract information indicative of the nature of the collected material.

7. A semiconductor wafer metrology method comprising:

heating a semiconductor wafer to expel material contained in enclosed voids formed in or beneath a layer deposited on the semiconductor wafer;

collecting the expelled material in a collector; and

measuring a consequential change in mass of the semiconductor wafer and/or the collector, to extract information indicative of the nature of the enclosed voids; and

after collecting the expelled material in the collector, applying localized heating to each of a plurality of regions of the collector to expel the collected material in each region, and analyzing the expelled collected material.

8. A method according to claim 7 , wherein analyzing the expelled collected material includes measuring the expelled collected material using a mass spectrometer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2026
From: METRYX LIMITED
To: LAM RESEARCH CORPORATION
Reel/Frame 074040/0493 →
Priority Claims (1)
GB 1105953.2 · Apr 7, 2011 · national
Continuity (2)
Continuation 14007344 · Sep 25, 2013
Related Publication 20160306004A1 · Oct 20, 2016