IP Library Granted Patent US 10,235,287
Granted Patent B2
US 10,235,287 · App. 15/197,196 · Granted Mar 19, 2019

Efficient management of paged translation maps in memory and flash

Inventors: Ajith Kumar Battaje (Karnataka, IN); Tanay Goel (Chhattisgarh, IN); Rajendra Prasad Mishra (Santa Clara, CA)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G06F12/0292G06F12/1009G06F2212/651
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Quick Facts
Patent No.
US 10,235,287
App. No.
15/197,196
Granted
Mar 19, 2019
Kind
B2
Abstract

A system comprising a processor and a memory storing instructions that, when executed, cause the system to receive a request to select translation table entries to store in a storage device, determine a plurality of translation table entries associated with a dump unit, allocate the plurality of translation table entries into a first group of translation table entries associated with a first node and a second group of translation table entries associated with a second node, the first group of translation table entries being frequently accessed and the second group of translation table entries being rarely accessed. determine a first status associated with a first recent access bit for a first translation table entry, the first translation table entry being included in the first group of translation table entries, and add the first translation table entry to the second group of translation table entries.

Claims (66)

1. A method comprising:

receiving a request to select translation table entries to store in a storage device;

determining a plurality of translation table entries associated with a dump unit;

allocating the plurality of translation table entries into a first group of translation table entries associated with a first node and a second group of translation table entries associated with a second node, the first group of translation table entries being frequently accessed and the second group of translation table entries being less frequently accessed;

determining a first status associated with a first recent access bit for a first translation table entry that is turned off, the first translation table entry being included in the first group of translation table entries; and

adding the first translation table entry to the second group of translation table entries.

2. The method of claim 1 , further comprising:

identifying a dump group associated with the dump unit;

determining a first plurality of dump units associated with the dump group;

determining a second plurality of dump units from the first plurality of dump units, the second plurality of dump units being dirty; and

determining a third plurality of dump units from the first plurality of dump units, wherein the third plurality of dump units are marked to remain in memory.

3. The method of claim 2 , further comprising:

calculating a ratio between the first plurality of dump units and the second plurality of dump units;

determining that the ratio satisfies a threshold; and

adding the dump group to a multi-level linked list based on the ratio.

4. The method of claim 3 , wherein the multi-level linked list includes a first level linked list and a second level linked list based on the threshold.

5. The method of claim 1 , wherein the first node and the second node are determined based on a ratio of a total number translation table entries in memory to a total number of translation table entries in a storage device.

6. The method of claim 1 , wherein the first status associated with the first recent access bit indicates that the first translation table entry is accessed before a threshold time.

7. The method of claim 1 , wherein the first recent access bit is associated with a second status whenever the first translation table entry is accessed.

8. The method of claim 1 , further comprising:

receiving a request to access a second translation table entry;

assigning a second status to a second recent access bit associated with the second translation table entry;

adding the second translation table entry to the first group of translation table entries;

determining the first status associated with a third recent access bit for a third translation table entry that is turned off, the third translation table entry being included in the first group of translation table entries; and

relocating the third translation table entry from the first group of translation table entries to the second group of translation table entries.

9. The method of claim 1 , further comprising:

receiving a request to relocate translation table entries to the storage device; and

selecting the first translation table entry from the second group of translation table entries to relocate to the storage device.

10. The method of claim 1 , further comprising:

persisting a first plurality of dump groups in the storage device;

determining that a memory consumption meets a threshold; and

relocating a first plurality of dump groups from the memory.

11. A system comprising:

a processor; and

a memory storing instructions that, when executed, cause the system to:

receive a request to select translation table entries to store in a storage device;

determine a plurality of translation table entries associated with a dump unit;

allocate the plurality of translation table entries into a first group of translation table entries associated with a first node and a second group of translation table entries associated with a second node, the first group of translation table entries being frequently accessed and the second group of translation table entries being rarely accessed;

determine a first status associated with a first recent access bit for a first translation table entry that is turned off, the first translation table entry being included in the first group of translation table entries; and

add the first translation table entry to the second group of translation table entries.

12. The system of claim 11 , further comprising:

identifying a dump group associated with the dump unit;

determining a first plurality of dump units associated with the dump group;

determining a second plurality of dump units from the first plurality of dump units, wherein the second plurality of dump units being dirty; and

determining a third plurality of dump units from the first plurality of dump units, wherein the third plurality of dump units are marked to remain in the memory.

13. The system of claim 12 , further comprising:

calculating a ratio between the first plurality of dump units and the second plurality of dump units;

determining that the ratio satisfies a threshold; and

adding the dump group to a multi-level linked list based on the ratio.

14. The system of claim 13 , wherein the multi-level linked list includes a first level linked list and a second level linked list based on the threshold.

15. The system of claim 11 , wherein the first node and the second node are determined based on a ratio of a total number translation table entries in the memory to a total number of translation table entries in a storage device.

16. The system of claim 11 , wherein the first status associated with the first recent access bit indicates that the first translation table entry is accessed before a threshold time.

17. The system of claim 11 , wherein the first recent access bit is associated with a second status whenever the first translation table entry is accessed.

18. The system of claim 11 , further comprising:

receiving a request to access a second translation table entry;

assigning a second status to a second recent access bit associated with the second translation table entry;

adding the second translation table entry to the first group of translation table entries;

determining the first status associated with a third recent access bit for a third translation table entry that is turned off, the third translation table entry being included in the first group of translation table entries; and

relocating the third translation table entry from the first group of translation table entries to the second group of translation table entries.

19. The system of claim 11 , further comprising:

receiving a request to relocate translation table entries to the storage device; and

selecting the first translation table entry from the second group of translation table entries to relocate to the storage device.

20. The system of claim 11 , further comprising:

persisting a first plurality of dump groups in the storage device;

determining that a memory consumption meets a threshold; and

relocating a first plurality of dump groups from the memory.

Assignments (12)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT SERIAL NO 15/025,946 PREVIOUSLY RECORDED AT REEL: 040831 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Sep 15, 2017
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 043973/0762 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2016
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 040831/0265 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2016
From: BATTAJE, AJITH KUMAR; GOEL, TANAY; MISHRA, RAJENDRA PRASAD
To: HGST NETHERLANDS B.V.
Reel/Frame 039124/0603 →
Continuity (1)
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