IP Library Granted Patent US 9,653,654
Granted Patent B2
US 9,653,654 · App. 15/227,198 · Granted May 16, 2017

Solid-state radiation transducer devices having at least partially transparent buried contact elements, and associated systems and methods

Inventors: Martin F. Schubert (Sunnyvale, CA); Vladimir Odnoblyudov (Danville, CA); Lifang Xu (Boise, ID)
Assignee: Micron Technology, Inc.
H01L33/405H01L33/0079H01L33/0095H01L33/06H01L33/32H01L33/382H01L33/42H01L33/502H01L33/56H01L2933/0016
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Quick Facts
Patent No.
US 9,653,654
App. No.
15/227,198
Granted
May 16, 2017
Kind
B2
Abstract

Solid-state radiation transducer (SSRT) devices having buried contacts that are at least partially transparent and associated systems and methods are disclosed herein. An SSRT device configured in accordance with a particular embodiment can include a radiation transducer including a first semiconductor material, a second semiconductor material, and an active region between the first semiconductor material and the second semiconductor material. The SSRT device can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. The second contact can include a plurality of buried-contact elements electrically coupled to the second semiconductor material. Individual buried-contact elements can have a transparent portion directly adjacent to the second semiconductor material. The second contact can further include a base portion extending between the buried-contact elements, such as a base portion that is least partially planar and reflective.

Claims (39)

1. A method of making a light-emitting diode device, the method comprising:

forming a light-emitting diode having a light-emitting region between a first semiconductor material and a second semiconductor material;

forming a contact electrically coupled to the first semiconductor material;

forming a via having a first end portion and an opposite second end portion, wherein the via extends from its first end portion through the contact, through the first semiconductor material, and through the light-emitting region toward its second end portion, and wherein the second end portion of the via is at the second semiconductor material;

forming a transparent dielectric material at least partially within the via;

forming a transparent conductive material at least partially within the via, wherein the transparent conductive material has

a first major surface at the second end portion of the via in direct contact with the second semiconductor material, and

an opposite second major surface at the first end portion of the via spaced apart from the second semiconductor material; and

forming a reflective conductive material in direct contact with the second major surface of the transparent conductive material.

2. The method of claim 1 , further comprising removing a portion of the transparent dielectric material to expose the second semiconductor material before forming the transparent conductive material.

3. The method of claim 1 wherein forming the transparent conductive material includes forming the transparent conductive material such that the transparent dielectric material and the transparent conductive material completely fill the via.

4. The method of claim 1 wherein forming the transparent conductive material includes forming the transparent conductive material in direct contact with the transparent dielectric material.

5. The method of claim 1 wherein forming the transparent conductive material includes forming the transparent conductive material to include indium tin oxide, zinc oxide, or a combination thereof.

6. The method of claim 1 wherein forming the transparent dielectric material includes forming the transparent dielectric material partially within the via and partially outside the via.

7. The method of claim 6 wherein forming the reflective conductive material includes forming the reflective conductive material in direct contact with a portion of the transparent dielectric material outside the via.

8. The method of claim 1 , further comprising forming a transparent alloy at the first major surface of the transparent conductive material.

9. The method of claim 8 wherein forming the transparent alloy includes annealing the transparent conductive material and the second semiconductor material at the first major surface of the transparent conductive material.

10. The method of claim 1 wherein forming the transparent conductive material includes forming the transparent conductive material partially within the via and partially protruding from the via.

11. The method of claim 10 , further comprising removing a portion of the transparent conductive material protruding from the via before forming the reflective conductive material.

12. The method of claim 11 wherein removing the portion of the transparent conductive material protruding from the via includes planarizing the transparent conductive material.

13. A method of making a light-emitting diode device, the method comprising:

forming a light-emitting diode having a light-emitting region between a first semiconductor material and a second semiconductor material;

forming a contact electrically coupled to the first semiconductor material;

forming a first via having a first opening and extending from the first opening toward the second semiconductor material;

forming a second via having a second opening and extending from the second opening toward the second semiconductor material;

forming a first transparent buried-contact element within the first via, wherein the first transparent buried-contact element has—

a first end portion spaced apart from the second semiconductor material, and

an opposite second end portion directly contacting the second semiconductor material;

forming a second transparent buried-contact element within the second via, wherein the second transparent buried-contact element has—

a first end portion spaced apart from the second semiconductor material, and

an opposite second end portion directly contacting the second semiconductor material; and

forming a reflective base having a planar surface adjacent to the first end portion of the first transparent buried-contact element, adjacent to the first end portion of the second transparent buried-contact element, and extending continuously over an entirety of the first opening, over an entirety of the second opening, and between the first and second openings.

14. The method of claim 13 wherein forming the first and second transparent buried-contact elements includes forming a transparent dielectric material partially within the first and second vias and partially outside the first and second vias.

15. The method of claim 14 wherein forming the reflective base includes forming the reflective base in direct contact with a portion of the transparent dielectric material outside the first and second vias.

16. The method of claim 13 , further comprising forming a transparent alloy at the second end portions of the first and second transparent buried-contact elements.

17. The method of claim 16 wherein forming the transparent alloy includes annealing the second end portions of the first and second transparent buried-contact elements and the second semiconductor material.

18. The method of claim 13 wherein forming the first and second transparent buried-contact elements includes forming a transparent conductive material partially within the first and second vias and partially protruding from the first and second vias.

19. The method of claim 18 , further comprising removing portions of the transparent conductive material protruding from the first and second vias before forming the reflective base.

20. The method of claim 19 wherein removing the portions of the transparent conductive material protruding from the first and second vias includes planarizing the transparent conductive material.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050680/0268 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 2 TO PATENT SECURITY AGREEMENT Recorded Feb 10, 2017
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041671/0902 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2016
From: SCHUBERT, MARTIN F.; ODNOBLYUDOV, VLADIMIR; XU, LIFANG
To: MICRON TECHNOLOGY, INC.
Reel/Frame 039330/0822 →
Continuity (2)
Division 13344226 · Jan 5, 2012
Related Publication 20160343912A1 · Nov 24, 2016