Grid array connection device and method
A method and device for input/output connections is provided. Devices and methods for connection structure are shown with improved mechanical properties such as hardness and abrasion resistance. Land grid array structures are provided that are less expensive to manufacture due to reductions in material cost such as gold. Ball grid array structures are provided with improved resistance to corrosion during fabrication. Ball grid array structures are also provided with improved mechanical properties resulting in improved shock testing results.
1. An electronic device comprising:
a chip package that includes a metallic connection structure;
a circuit board; and
a chip connection structure coupled with the chip package and the circuit board, wherein the chip connection structure includes:
a first layer that includes nickel (Ni) coupled with the metallic connection structure;
a solder structure;
an intermetallic layer that includes copper (Cu), nickel (Ni) and tin (Sn) between the first layer and the solder structure; and
a second layer that includes tin (Sn), nickel (Ni), copper (Cu) and phosphorous (P) between the intermetallic layer and the first layer.
2. The electronic device of claim 1 , wherein the intermetallic layer includes crystalline grains.
3. The electronic device of claim 2 , wherein the crystalline grains are elongated.
4. The electronic device of claim 1 , wherein the intermetallic layer includes (CuNi) 6 Sn 5 .
5. The electronic device of claim 1 , wherein the first layer further includes phosphorous (P).
6. The electronic device of claim 1 , wherein the solder structure includes tin (Sn), silver (Ag) and copper (Cu).
7. The electronic device of claim 1 , wherein the metallic connection structure comprises copper (Cu).
8. The electronic device of claim 1 , wherein the solder structure includes a ball grid array solder ball.
9. The electronic device of claim 1 , wherein the chip connection structure provides an input/output connection between the chip package and the circuit board.
10. The electronic device of claim 1 , wherein the solder structure includes palladium (Pd).
11. A method comprising:
forming, on a metallic connection structure of a chip package, a first layer that includes nickel (Ni);
forming a second layer that includes tin (Sn), nickel (Ni), copper (Cu) and phosphorous (P);
forming an intermetallic layer that includes copper (Cu), nickel (Ni) and tin (Sn), wherein a location of the second layer is between a location of the first layer and a location of the intermetallic layer; and
forming a solder structure, wherein the location of the intermetallic layer is between the location of the second layer and a location of the solder structure.
12. The method of claim 11 , wherein the intermetallic layer includes crystalline grains.
13. The method of claim 12 , wherein the crystalline grains are elongated.
14. The method of claim 11 , wherein the intermetallic layer includes (CuNi) 6 Sn 5 .
15. The method of claim 11 , wherein the first layer further includes phosphorous (P).
16. The method of claim 11 , wherein the solder structure includes tin (Sn), silver (Ag) and copper (Cu).
17. The method of claim 11 , wherein the metallic connection structure comprises copper (Cu).
18. The method of claim 11 , wherein the solder structure includes a ball grid array solder ball.
19. The method of claim 11 , further comprising providing, by the chip connection structure an input/output connection between the chip package and the circuit board.
20. The method of claim 11 , wherein the solder structure includes palladium (Pd).