IP Library › Granted Patent US 9,972,531
Granted Patent B2
US 9,972,531 · App. 15/291,593 · Granted May 15, 2018

Method of manufacturing a semiconductor device having groove-shaped via-hole

Inventor: Kenichi Watanabe (Yokohama, JP)
Assignee: SOCIONEXT INC.
H01L21/76877H01L21/76804H01L21/76843H01L23/481H01L23/485H01L23/522H01L23/528H01L23/5226H01L23/5283H01L23/5329H01L23/53204H01L23/53223H01L23/53228H01L23/53266H01L23/562H01L23/58H01L23/585H01L29/0607H01L29/0611H01L29/0619H01L23/5227H01L23/53295H01L2924/0002
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Quick Facts
Patent No.
US 9,972,531
App. No.
15/291,593
Granted
May 15, 2018
Kind
B2
Abstract

The semiconductor device has insulating films 40, 42 formed over a substrate 10 ; an interconnection 58 buried in at least a surface side of the insulating films 40, 42 ; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66 a having a pattern bent at a right angle; and buried conductors 70, 72 a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66 a . A groove-shaped via-hole 66 a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66 . Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.

Claims (70)

1. A method of manufacturing a semiconductor device having a plurality of guard rings, comprising

providing a semiconductor substrate that includes a semiconductor circuit region;

forming a first insulating film above the semiconductor substrate;

forming a plurality of first interconnection grooves in the first insulating film;

filling the plurality of first interconnection grooves with a first conductive material that includes copper;

forming a second insulating film above the first insulating film;

forming, in the second insulating film, a plurality of first groove-shaped via-holes, a plurality of hole-shaped via-holes and a plurality of second interconnection grooves above the plurality of first groove-shaped via-holes; and

filling each of the first groove-shaped via-holes, each of the hole-shaped via-holes and each of the second interconnection grooves with a second conductive material that includes copper,

wherein

each of the plurality of guard rings includes the first interconnection groove, the first groove-shaped via-hole, and second interconnection groove;

each of the plurality of guard rings continuously surrounds the semiconductor circuit region in a plan view;

the first conductive material in the first interconnection groove is coupled to the second conductive material in the second interconnection groove;

each of the first groove-shaped via-holes includes a pattern bent twice each time at an angle of larger than 90° at each of four corners of the semiconductor circuit region in a plan view; and

the pattern is bent in total at 90° at each of the four corners in a plan view.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the first conductive material and the second conductive material are the same.

3. The method of manufacturing a semiconductor device according to claim 2 , wherein the first insulating film includes silicon, carbon and oxygen, and

the second insulating film includes silicon, carbon and oxygen.

4. The method of manufacturing a semiconductor device according to claim 2 , further comprising:

forming a first metal film, that includes tantalum, in the plurality of the first interconnection grooves before filling the plurality of the first interconnection grooves with the first conductive material; and

forming a second metal film, that includes tantalum, in the plurality of the second interconnection grooves and the plurality of the first groove-shaped via-holes before filling the plurality of the second interconnection grooves and the plurality of the first groove-shaped via-holes with the second conductive material.

5. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a plurality of aluminum patterns above the second conductive material;

wherein each of the plurality of guard rings includes the aluminum pattern.

6. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a third insulating film above the semiconductor substrate;

forming a plurality of second groove-shaped via-holes in the third insulating film; and

filling the plurality of the second groove-shaped via-holes with a third conductive material that includes tungsten before forming the first insulating film,

wherein:

after filling the plurality of the second groove-shaped via-holes with the third conductive material, the first insulating film is formed above the third insulating film and the third conductive material;

each of the plurality of guard rings further include a second groove-shaped via-hole; and

the third conductive material in the second groove-shaped via-hole is coupled to the semiconductor substrate.

7. The method of manufacturing a semiconductor device according to claim 1 , wherein the plurality of guard rings consists of two guard rings.

8. The method of manufacturing a semiconductor device according to claim 1 , wherein the plurality of guard rings consists of three guard rings.

9. The method of manufacturing a semiconductor device according to claim 1 , wherein the plurality of guard rings consists of four guard rings.

10. A method of manufacturing a semiconductor device having a plurality of guard rings, comprising

providing a semiconductor substrate that includes a semiconductor circuit region;

forming a first insulating film above the semiconductor substrate;

forming a plurality of first interconnection grooves in the first insulating film;

filling the plurality of first interconnection grooves with a first conductive material that includes copper;

forming a second insulating film above the first insulating film;

forming a third insulating film above the second insulating film;

forming a plurality of first groove-shaped via-holes and a plurality of hole-shaped via-holes in the second insulating film and a plurality of second interconnection grooves in at least the third insulating film; and

filling each of the first groove-shaped via-holes, each of the hole-shaped via-holes and each of the second interconnection grooves with a second conductive material that includes copper,

wherein:

each of the plurality of guard rings continuously surrounds the semiconductor circuit region in a plan view;

each of the plurality of guard rings includes the first interconnection groove, the first groove-shaped via-hole, and second interconnection groove;

the first conductive material in the first interconnection groove is coupled to the second conductive material in the second interconnection groove;

each of the first groove-shaped via-holes includes a pattern bent twice each time at an angle of larger than 90° at each of four corners of the semiconductor circuit region in a plan view; and

the pattern is bent in total at 90° at each of the four corners in a plan view.

11. The method of manufacturing a semiconductor device according to claim 10 , wherein the first conductive material and the second conductive material are the same.

12. The method of manufacturing a semiconductor device according to claim 11 , wherein the first insulating film includes silicon, carbon and oxygen,

the second insulating film includes silicon and oxygen, and

the third insulating film includes silicon, carbon and oxygen.

13. The method of manufacturing a semiconductor device according to claim 11 , further comprising:

forming a first metal film, that includes tantalum, in the plurality of the first interconnection grooves before filling the plurality of the first interconnection grooves with the first conductive material; and

forming a second metal film, that includes tantalum, in the plurality of the second interconnection grooves and the plurality of the first groove-shaped via-holes before filling the plurality of the second interconnection grooves and the plurality of the first groove-shaped via-holes with the second conductive material.

14. The method of manufacturing a semiconductor device according to claim 10 , further comprising:

forming a plurality of aluminum patterns above the second conductive material;

wherein each of the plurality of guard rings includes the aluminum pattern.

15. The method of manufacturing a semiconductor device according to claim 10 , further comprising:

forming a fourth insulating film above the semiconductor substrate;

forming a plurality of second groove-shaped via-holes in the fourth insulating film; and

filling the plurality of the second groove-shaped via-holes with a third conductive material that includes tungsten before forming the first insulating film,

wherein:

after filling the plurality of the second groove-shaped via-holes with the third conductive material, the first insulating film is formed above the third insulating film and the third conductive material;

each of the plurality of guard rings further include a second groove-shaped via-hole; and

the third conductive material in the second groove-shaped via-hole is coupled to the semiconductor substrate.

16. The method of manufacturing a semiconductor device according to claim 10 , wherein the plurality of guard rings consists of two guard rings.

17. The method of manufacturing a semiconductor device according to claim 10 , wherein the plurality of guard rings consists of three guard rings.

18. The method of manufacturing a semiconductor device according to claim 10 , wherein the plurality of guard rings consists of four guard rings.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2016
From: WATANABE, KENICHI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 039999/0560 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 040000/0233 →
Priority Claims (1)
JP 2002-223343 · Jul 31, 2002 · national
Continuity (6)
Division 14310612 · Jun 20, 2014
Division 13549006 · Jul 13, 2012
Division 13013103 · Jan 25, 2011
Division 11898548 · Sep 13, 2007
Division 10622614 · Jul 21, 2003
Related Publication 20170033005A1 · Feb 2, 2017