Package on package configuration
A first integrated circuit (IC) package has a package substrate on bottom. The package substrate comprises a bottom redistribution circuitry configured according to printed circuit board (PCB) design rule and a top redistribution circuitry configured according to integrated circuit (IC) design rule. The first IC package has a plurality of top metal pads and a plurality of copper pillars configured on a top side according to IC design rule. A second IC package has a plurality of bottom metal pads configured according to IC design rule configured on a top side of the first IC package. The first IC package electrically couples to the second IC package through the plurality of copper pillars.
1. A package on package configuration, comprising:
a first redistribution circuitry having a plurality of first bottom metal pads and a plurality of first top metal pads, a plurality of first metal via electrically coupling the first bottom metal pads to the first top metal pads, wherein each of the first metal vias has a shape with top wide bottom narrow;
a second redistribution circuitry configured on a top side of the first redistribution circuitry and having a plurality of second bottom metal pads and a plurality of second top metal pads, a plurality of second metal via electrically coupling the second bottom metal pads to the second top metal pads, wherein each of the second metal vias has a shape with top wide bottom narrow;
a bottommost layer of the second metal vias electrically coupled to the first top metal pads;
at least one first chip configured on a top side of the second top metal pads among the plurality of second top metal pads;
a molding compound embedding the at least one first chip; and
a plurality of copper pillars configured on a top side of the second top metal pads among the plurality of the second top metal pads.
2. The package on package configuration as claimed in claim 1 , further comprising:
a second IC package configured on a top side of the plurality of copper pillars.
3. The package on package configuration as claimed in claim 2 , further comprising:
a third redistribution circuitry configured on a bottom side of the second IC package; and
a plurality of metal contacts configured on a bottom side of the third redistribution circuitry.
4. The package on package configuration as claimed in claim 3 , wherein
the plurality of metal contacts electrically coupled to the plurality of copper pillars respectively.
5. The package on package configuration as claimed in claim 4 , wherein
a gap is formed between the second IC package and the first IC package.
6. The package on package configuration as claimed in claim 5 , wherein the gap has a space height roughly equals to a height of the plurality of metal contacts.
7. The package on package configuration as claimed in claim 6 , wherein a bonding material fills in the gap to enhance the bounding strength therebetween.
8. A fabrication process for a package on package configuration comprising:
fabricating a first redistribution circuitry having a plurality of first bottom metal pads and a plurality of first top metal pads, a plurality of first metal via electrically coupling the first bottom metal pads to the first top metal pads, wherein each of the first metal vias has a shape with top wide bottom narrow;
fabricating a second redistribution circuitry on a top side of the first redistribution circuitry, the second redistribution circuitry having a plurality of second bottom metal pads and a plurality of second top metal pads, a plurality of second metal vias electrically coupling the second bottom metal pads to the second top metal pads, wherein each of the second metal vias has a shape with top wide bottom narrow;
configuring a plurality of copper pillars on a top side of the second top metal pads among the plurality of the second top metal pads;
configuring at least one first chip on a top side of the second top metal pads among the plurality of second top metal pads; and
applying a dielectric layer to embed the at least one first chip.
9. The fabrication process as claimed in claim 8 , further comprising:
configuring a second IC package on a top side of the plurality of copper pillars.
10. The fabrication process as claimed in claim 9 , further comprising:
configuring a third redistribution circuitry on a bottom side of the second IC package; and
configuring a plurality of metal contacts on a bottom side of the third redistribution circuitry.
11. The fabrication process as claimed in claim 10 , further comprising:
electrically coupling the plurality of metal contacts to the plurality of copper pillars; wherein
a gap is formed between the second IC package and the first IC package, and the gap has a space height roughly equals to a height of the plurality of top metal pads on a top side of the copper pillars.
12. The fabrication process as claimed in claim 11 , further comprising:
filling a bonding material in the gap to enhance the bounding strength therebetween.