Multi-chip modules formed using wafer-level processing of a reconstituted wafer
Apparatuses and methods are described. This apparatus includes a bridge die having first contacts on a die surface being in a molding layer of a reconstituted wafer. The reconstituted wafer has a wafer surface including a layer surface of the molding layer and the die surface. A redistribution layer on the wafer surface includes electrically conductive and dielectric layers to provide conductive routing and conductors. The conductors extend away from the die surface and are respectively coupled to the first contacts at bottom ends thereof. At least second and third IC dies respectively having second contacts on corresponding die surfaces thereof are interconnected to the bridge die and the redistribution layer. A first portion of the second contacts are interconnected to top ends of the conductors opposite the bottom ends thereof in part for alignment of the at least second and third IC dies to the bridge die.
1. A microelectronic device comprising:
a reconstituted portion having a first surface and a second surface opposite the first surface, the reconstituted portion comprising:
a bridge die having a plurality of contacts having a bridge contact pitch at a contact surface of the bridge die, the contact surface opposite a back surface of the bridge die, the back surface spaced apart from the contact surface along a vertical direction, wherein an insulating layer is disposed on the back surface of the bridge die such that the back surface of the bridge die is vertically offset from the second surface of the reconstituted portion, the back surface disposed between the first and second surfaces of the reconstituted portion along the vertical direction;
a first molding compound disposed along at least one side surface of the bridge die between the first and second surfaces of the reconstituted portion; and
a plurality of in-mold vias extending through the first molding compound, the plurality of in-mold vias including a first in-mold via and a second in-mold via disposed adjacent the first in-mold via, the first and second in-mold vias spaced apart by a via spacing larger than the bridge contact pitch;
a redistribution layer (RDL) formed on the first surface of the reconstituted portion and extending over the bridge die, the first molding compound, and the plurality of in-mold vias, the RDL including conductive routing comprising lateral metal traces and vertical metal vias, the conductive routing connected to first and second contacts of the plurality of contacts of the bridge die and to first ends of the in-mold vias, second ends of the in-mold vias extending to the second surface of the reconstituted portion such that the second ends of the in-mold vias are offset from the back surface of the bridge die along the vertical direction;
a first integrated circuit die having third and fourth contacts in a back-end-of-line (BEOL) stack of the first integrated circuit die, the third and fourth contacts electrically connected to the RDL by way of first and second bumps, the RDL providing electrical communication between the third contact and the first in-mold via of the plurality of in-mold vias and providing electrical communication between the fourth contact of the first integrated circuit die and the first contact of the bridge die; and
a second integrated circuit die having fifth and sixth contacts in a BEOL stack of the second integrated device die, the fifth and sixth contacts electrically connected to the RDL by way of third and fourth bumps, the RDL providing electrical communication between the fifth contact and a third in-mold via of the plurality of in-mold vias and providing electrical communication between the sixth contact of the second integrated circuit die and the second contact of the bridge die,
wherein the first integrated circuit die includes a first plurality of contacts disposed over the first molding compound and a second plurality of contacts disposed over the bridge die, the first plurality of contacts having a first pitch that is different from a second pitch of the second plurality of contacts.
2. The microelectronic device according to claim 1 , further comprising a second molding compound over the RDL and in which the first and second integrated circuit dies are at least partially embedded.
3. The microelectronic device according to claim 2 , wherein a first portion of the second molding compound is disposed between the first and second integrated circuit dies.
4. The microelectronic device according to claim 3 , wherein a second portion of the second molding compound is disposed about respective peripheral sides of the first and second integrated circuit dies.
5. The microelectronic device according to claim 1 , further comprising an interconnect structure attached to the second surface of the reconstituted portion and electrically connected to the second ends of the in-mold vias at the second surface.
6. The microelectronic device according to claim 5 , wherein the interconnect structure comprises a package substrate.
7. The microelectronic device according to claim 1 , wherein the first integrated circuit die and second integrated circuit die partially overlap the bridge die.
8. The microelectronic device according to claim 1 , wherein the first integrated circuit die and the second integrated circuit die are electrically connected.
9. The microelectronic device according to claim 1 , wherein the bridge die comprises a passive die.
10. The microelectronic device according to claim 1 , wherein the bridge die comprises an active die.
11. The microelectronic device according to claim 1 , wherein the plurality of in-mold vias comprises copper.
12. The microelectronic device according to claim 1 , wherein the first integrated circuit die includes a first plurality of contacts including the third contact and a second plurality of contacts including the fourth contact, the first plurality of contacts connected to in-mold vias of the plurality of in-mold vias, the second plurality of contacts connected to contacts of the plurality of contacts of the bridge die, the first plurality of contacts having a first pitch that is different from a second pitch of the second plurality of contacts.
13. The microelectronic device of claim 1 , wherein the bridge contact pitch is less than approximately 60 microns.
14. The microelectronic device of claim 1 , wherein the first plurality of contacts includes the third contact and wherein the second plurality of contacts includes the fourth contact.
15. The microelectronic device of claim 6 , further comprising a plurality of solder balls electrically connected to the package substrate, wherein a solder ball pitch of the plurality of solder balls is larger than the via spacing.
16. The microelectronic device of claim 12 , wherein at least one of the first and second pitches is less than approximately 60 microns.
17. The microelectronic device of claim 1 , wherein a space between the first in-mold via and the second in-mold via is filled with the first molding compound.
18. A microelectronic device comprising:
a bridge die at least partially embedded in a first molding compound, at least one in-mold via extending through the first molding compound and having a first end and a second end opposite the first end, the bridge die having a contact surface and a back surface opposite the contact surface, the back surface spaced apart from the contact surface along a vertical direction, wherein an insulating layer is disposed on the back surface of the bridge die such that the back surface of the bridge die is vertically offset from the second end of the in-mold via, the back surface disposed between the second end of the in-mold via and the contact surface along the vertical direction;
a redistribution layer (RDL) disposed over the contact surface of the bridge die, the first molding compound, and the at least one in-mold via, the RDL including conductive routing comprising lateral metal traces and vertical metal vias, the conductive routing connected to the bridge die and to the first end of the at least one in-mold via;
a first integrated circuit die having a first plurality of contacts in a back-end-of-line (BEOL) stack of the first integrated circuit die, the first plurality of contacts electrically connected to the RDL by way of a first plurality of bumps, the RDL providing electrical communication between the first integrated circuit die and the bridge die and between the first integrated circuit die and the at least one in-mold via, the first plurality of contacts including a first set of contacts disposed over the first molding compound and a second set of contacts disposed over the bridge die, the first set of contacts having a first pitch different from a second pitch of the second set of contacts; and
a second integrated circuit die having a second plurality of contacts in a back-end-of-line (BEOL) stack of the second integrated circuit die, the second plurality of contacts electrically connected to the RDL by way of a second plurality of bumps, the RDL providing electrical communication between the second integrated circuit die and the bridge die.
19. The microelectronic device of claim 18 , wherein the at least one in-mold via comprises a plurality of in-mold vias, the RDL providing electrical communication between the first integrated circuit die and a first in-mold via of the plurality of in-mold vias and between the second integrated circuit die and a second in-mold via of the plurality of in-mold vias.
20. The microelectronic device according to claim 18 , further comprising a second molding compound over the RDL and in which the first and second integrated circuit dies are at least partially embedded.
21. The microelectronic device according to claim 20 , wherein a first portion of the second molding compound is disposed between the first and second integrated circuit dies.
22. The microelectronic device according to claim 21 , wherein a second portion of the second molding compound is disposed about respective peripheral sides of the first and second integrated circuit dies.
23. The microelectronic device according to claim 18 , further comprising an interconnect structure positioned at a side of the bridge die opposite the RDL, the interconnect structure electrically connected to the second end of the at least one in-mold via.
24. The microelectronic device according to claim 23 , wherein the interconnect structure comprises.
25. The microelectronic device of claim 18 , wherein the at least one in-mold via comprises a plurality of in-mold vias, wherein the first set of contacts is connected to the plurality of in-mold vias by way of the RDL and the second set of contacts is connected to the bridge die by way of the RDL.
26. The microelectronic device of claim 18 , wherein the bridge die includes a plurality of contacts having a bridge contact pitch at a surface of the bridge die, wherein the at least one in-mold via comprises a first in-mold via and a second in-mold via disposed adjacent the first in-mold via, the first and second in-mold vias spaced apart by a via spacing larger than the bridge contact pitch.
27. The microelectronic device of claim 19 , wherein a space between the first in-mold via and the second in-mold via is filled with the first molding compound.
28. A microelectronic device comprising:
a reconstituted portion having a first surface and a second surface opposite the first surface, the reconstituted portion comprising:
a bridge die having a plurality of contacts having a bridge contact pitch at a contact surface of the bridge die, the contact surface opposite a back surface of the bridge die, the back surface spaced apart from the contact surface along a vertical direction, wherein an insulating layer is disposed on the back surface of the bridge die such that the back surface of the bridge die is vertically offset from the second surface of the reconstituted portion, the back surface disposed between the first and second surfaces of the reconstituted portion along the vertical direction;
a first molding compound disposed along at least one side surface of the bridge die between the first and second surfaces of the reconstituted portion; and
a plurality of in-mold vias extending through the first molding compound, the plurality of in-mold vias including a first in-mold via and a second in-mold via disposed adjacent the first in-mold via, the first and second in-mold vias spaced apart by a via spacing larger than the bridge contact pitch;
a redistribution layer (RDL) formed on the first surface of the reconstituted portion and extending over the bridge die, the first molding compound, and the plurality of in-mold vias, the RDL including conductive routing comprising lateral metal traces and vertical metal vias, the conductive routing connected to first and second contacts of the plurality of contacts of the bridge die and to first ends of the in-mold vias, second ends of the in-mold vias extending to the second surface of the reconstituted portion such that the second ends of the in-mold vias are offset from the back surface of the bridge die along the vertical direction;
a first integrated circuit die having third and fourth contacts in a back-end-of-line (BEOL) stack of the first integrated circuit die, the third and fourth contacts electrically connected to the RDL by way of first and second bumps, the RDL providing electrical communication between the third contact and the first in-mold via of the plurality of in-mold vias and providing electrical communication between the fourth contact of the first integrated circuit die and the first contact of the bridge die; and
a second integrated circuit die having fifth and sixth contacts in a BEOL stack of the second integrated device die, the fifth and sixth contacts electrically connected to the RDL by way of third and fourth bumps, the RDL providing electrical communication between the fifth contact and a third in-mold via of the plurality of in-mold vias and providing electrical communication between the sixth contact of the second integrated circuit die and the second contact of the bridge die,
wherein the first integrated circuit die includes a first plurality of contacts including the third contact and a second plurality of contacts including the fourth contact, the first plurality of contacts connected to in-mold vias of the plurality of in-mold vias, the second plurality of contacts connected to contacts of the plurality of contacts of the bridge die, the first plurality of contacts having a first pitch that is different from a second pitch of the second plurality of contacts.
29. The microelectronic device of claim 28 , further comprising a second molding compound over the RDL and in which the first and second integrated circuit dies are at least partially embedded.
30. The microelectronic device of claim 28 , wherein the first integrated circuit die and the second integrated circuit die partially overlap the bridge die.