IP Library › Granted Patent US 11,764,177
Granted Patent B2
US 11,764,177 · App. 17/171,531 · Granted Sep 19, 2023

Bonded structure with interconnect structure

Inventor: Belgacem Haba (Saratoga, CA)
Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
H01L24/08H01L23/3121H01L23/5383H01L24/05H01L24/80H01L24/96H01L24/97H01L25/0655H01L2224/05647H01L2224/08235
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Quick Facts
Patent No.
US 11,764,177
App. No.
17/171,531
Granted
Sep 19, 2023
Kind
B2
Abstract

A bonded structure is disclosed. The bonded structure can include an interconnect structure. The bonded structure can also include a first die directly bonded to the interconnect structure. The bonded structure can also include a second die mounted to the interconnect structure. The second die is spaced apart from the first die laterally along an upper surface of the interconnect structure. The second die is electrically connected with the first die at least partially through the interconnect structure. The bonded structure can further include a dielectric layer that is disposed over the upper surface of the interconnect structure between the first die and the second die.

Claims (36)

1. A bonded structure comprising:

an interconnect structure having conductors at least partially embedded in a non-conductive material and an upper surface, the upper surface comprising a first conductive pad, a second conductive pad, and a non-conductive region;

a first integrated device die having a first bonding surface, the first bonding surface comprising a first conductive bond pad and a first non-conductive material, the first conductive bond pad directly bonded to the first conductive pad without an intervening adhesive, and the first non-conductive material directly bonded to a first portion of the non-conductive region;

a second integrated device die mounted to the interconnect structure, the second integrated device die spaced apart from the first integrated device die laterally along the upper surface of the interconnect structure, the second integrated device die electrically connected with the first integrated device die through at least the interconnect structure; and

a dielectric layer disposed over the upper surface of the interconnect structure between the first integrated device die and the second integrated device die,

wherein the interconnect structure comprises a transfer redistribution layer (RDL), a lower surface of the interconnect structure opposite the upper surface comprising a direct hybrid bonding surface.

2. The bonded structure of claim 1 , further comprising an encapsulant over the dielectric layer between the first integrated device die and the second integrated device die.

3. The bonded structure of claim 2 , wherein the dielectric layer has a coefficient of thermal expansion (CTE) lower than a CTE of the encapsulant.

4. The bonded structure of claim 2 , wherein the dielectric layer is disposed between the encapsulant and the first integrated device die and between the encapsulant and a portion of the upper surface of the interconnect structure, the dielectric layer is disposed along a sidewall of the first integrated device die, a portion of the upper surface of the interconnect structure, and a sidewall of the second integrated device die.

5. The bonded structure of claim 1 , wherein the lower surface of the interconnect structure is directly hybrid bonded to a carrier.

6. The bonded structure of claim 1 , wherein the first bonding surface of the first integrated device die comprises an active surface of the first integrated device die.

7. The bonded structure of claim 1 , further comprising a support structure coupled to the first integrated device die and the second integrated device die such that the first integrated device die and the second integrated device die are positioned between the interconnect structure and the support structure.

8. The bonded structure of claim 1 , wherein the interconnect structure comprises a first conductive line connected to the first conductive pad by way of a first conductive via, and a second conductive line connected to the second conductive pad by way of a second conductive via.

9. The bonded structure of claim 1 , wherein the second integrated device die comprises a second bonding surface, the second bonding surface comprising a second conductive bond pad and a second non-conductive material, the second conductive bond pad bonded to the second conductive pad, and the second non-conductive material bonded to a second portion of the non-conductive region different from the first portion, the second conductive bond pad is directly bonded to the second conductive pad without an intervening adhesive, and the second non-conductive material directly bonded to a second portion of the non-conductive region different from the first portion without an intervening adhesive.

10. A bonded structure comprising:

an interconnect structure having conductors at least partially embedded in a non-conductive material, an upper surface, and a lower surface opposite the upper surface, the upper surface comprising a first conductive pad, a second conductive pad in electrical communication with the first conductive pad, and a non-conductive region, the lower surface comprising a direct hybrid bonding surface;

a first integrated device die having a first bonding surface, the first bonding surface comprising a first conductive bond pad and a first non-conductive material, the first conductive bond pad directly bonded to the first conductive pad without an intervening adhesive, and the first non-conductive material directly bonded to a first portion of the non-conductive region;

a second integrated device die mounted to the interconnect structure, the second die spaced apart from the first integrated device die laterally along the upper surface of the interconnect structure;

an encapsulant disposed between the first integrated device die and the second integrated device die;

a dielectric layer disposed at least between the encapsulant and the first integrated device die or between the encapsulant and the upper surface of the interconnect structure; and

a carrier, the direct hybrid bonding surface of the lower surface of the interconnect structure directly hybrid bonded to the carrier.

11. The bonded structure of claim 10 , wherein the dielectric layer has a coefficient of thermal expansion (CTE) lower than a CTE of the encapsulant.

12. The bonded structure of claim 10 , wherein the dielectric layer is disposed between the encapsulant and the first integrated device die and between the encapsulant and a portion of the upper surface of the interconnect structure.

13. The bonded structure of claim 10 , further comprising a support structure coupled to the first integrated device die and the second integrated device die such that the first integrated device die and the second integrated device die are positioned between the interconnect structure and the support structure.

14. A bonded structure comprising:

an interconnect structure having conductors at least partially embedded in a non-conductive material, a upper surface, and a lower surface opposite the upper surface, the upper surface comprising a first conductive pad, a second conductive pad, and a non-conductive region between the first conductive pad and the second conductive pad, the lower surface comprising a direct hybrid bonding surface;

a first die having a first bonding surface, the first bonding surface comprising a first conductive bond pad and a first non-conductive material, the first bonding surface of the first die comprising an active surface of the first die, the first conductive bond pad directly bonded to the first conductive pad without an intervening adhesive, and the first non-conductive material directly bonded to a first portion of the non-conductive region;

a second die having a second bonding surface facing the interconnect structure, the second die mounted to the interconnect structure, the second die spaced apart from the first die laterally along the upper surface of the interconnect structure, the second die comprising a back side opposite the second bonding surface, the back side of the second die comprises an active surface of the second die;

an encapsulant disposed between the first die and the second die; and

a silicon oxide layer disposed between the encapsulant and the first die or between the encapsulant and the upper surface of the interconnect structure,

wherein the interconnect structure comprises a transfer redistribution layer (RDL).

15. The bonded structure of claim 14 , wherein the lower surface of the interconnect structure is directly hybrid bonded to a carrier, and the first die and the second die are electrically connected with each other at least partially through the interconnect structure.

16. The bonded structure of claim 14 , wherein the silicon oxide layer is disposed between the encapsulant and the first die and between the encapsulant and a portion of the upper surface of the interconnect structure.

17. The bonded structure of claim 14 , wherein the silicon oxide layer is disposed along a sidewall of the first die, a portion of the upper surface, and a sidewall of the second die.

18. The bonded structure of claim 14 , wherein the interconnect structure comprises a first conductive line connected to the first conductive pad by way of a first conductive via, and a second conductive line connected to the second conductive pad by way of a second conductive via.

19. The bonded structure of claim 14 , wherein the second bonding surface comprises a second conductive bond pad and a second non-conductive material, the second conductive bond pad bonded to the second conductive pad, and the second non-conductive material bonded to a second portion of the non-conductive region different from the first portion.

Assignments (3)
CHANGE OF NAME Recorded Aug 2, 2023
From: INVENSAS BONDING TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
Reel/Frame 064473/0436 →
SECURITY INTEREST Recorded May 19, 2023
From: ADEIA GUIDES INC.; ADEIA MEDIA HOLDINGS LLC; ADEIA MEDIA SOLUTIONS INC.; ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR SOLUTIONS LLC; ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 063707/0884 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2021
From: HABA, BELGACEM
To: INVENSAS BONDING TECHNOLOGIES, INC.
Reel/Frame 055867/0120 →
Continuity (2)
Provisional Application 63074928 · Sep 4, 2020
Related Publication 20220077087A1 · Mar 10, 2022
Cited By (11)
US 12,199,018 US 12,248,869 US 12,266,640 US 12,266,650 US 12,272,677 US 12,322,718 US 12,341,025 US 12,347,820 US 12,374,656 US 12,401,011 US 12,406,959