IP Library Granted Patent US 8,415,808
Granted Patent B2
US 8,415,808 · App. 12/844,959 · Granted Apr 9, 2013

Semiconductor device with die stack arrangement including staggered die and efficient wire bonding

Inventors: Chih-Chin Liao (Changhua, TW); Cheeman Yu (Madison, WI); Ya Huei Lee (Luzhou, TW)
Assignee: SanDisk Technologies Inc.
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Quick Facts
Patent No.
US 8,415,808
App. No.
12/844,959
Granted
Apr 9, 2013
Kind
B2
Abstract

A semiconductor die package is disclosed. An example of the semiconductor package includes a first group of semiconductor die interspersed with a second group of semiconductor die. The die from the first and second groups are offset from each other along a first axis and staggered with respect to each other along a second axis orthogonal to the first axis. A second example of the semiconductor package includes an irregular shaped edge and a wire bond to the substrate from a semiconductor die above the lowermost semiconductor die in the package.

Claims (13)

1. A semiconductor device, comprising:

a substrate including a single row of aligned contact pads;

a first semiconductor die mounted on the substrate and having a first set of die bond pads, an x-axis and a y-axis being parallel with orthogonal edges of the first semiconductor die;

a second semiconductor die mounted on top of the first semiconductor die and having a second set of die bond pads, the second semiconductor die being offset along the x-axis with respect to the first semiconductor die, and the second semiconductor die being staggered along the y-axis with respect to the first semiconductor die;

a first set of wire bonds between the first set of die bond pads and contact pads in the single row of contact pads on the substrate; and

a second set of wire bonds between the second set of die bond pads and contact pads in the single row of contact pads on the substrate, the first and second sets of wire bonds interspersed with each other.

2. The semiconductor device of claim 1 , wherein the first and second semiconductor die are flash memory semiconductor die.

3. The semiconductor device of claim 1 , wherein the first and second semiconductor die are NAND semiconductor die.

4. The semiconductor device of claim 1 , further comprising a controller die mounted on the second semiconductor die and electrically connected to the substrate.

5. The semiconductor device of claim 4 , further comprising molding compound surrounding at least the first and second semiconductor die, the first and second sets of wire bonds and the controller die.

6. The semiconductor device of claim 1 , wherein the substrate is one of a printed circuit board, a leadframe and a tape automated bonded tape.

7. The semiconductor device of claim 1 , the package comprising one of a CompactFlash card, a SmartMedia card, a Memory Stick, a Secure Digital card, a miniSD card, a microSD card, and a USB memory card.

8. The semiconductor device of claim 1 , wherein at least one of the first and second sets of wire bonds are electrically insulated.

Assignments (6)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0850 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2011
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 026294/0958 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 28, 2010
From: LIAO, CHIH-CHIN; YU, CHEEMAN; LEE, YA HUEI
To: SANDISK CORPORATION
Reel/Frame 024751/0966 →
Continuity (1)
Related Publication 20120025396A1 · Feb 2, 2012