Semiconductor device including stacked die with continuous integral via holes
A semiconductor device and a fabricating method of semiconductor device are disclosed. The semiconductor device includes: a substrate having a bonding pad on a surface of the substrate; at least two semiconductor components each having a first surface and a second surface opposite the first surface, the semiconductor components stacked on top of each other on the surface of the substrate via a layer of component attach material attached on the second surface of the respective semiconductor component; an integral through via hole extending completely through the semiconductor components and the layers of component attach material and having a substantially uniform diameter along an extending direction of the integral through via hole aligned with the bonding pad on the surface of the substrate, and a continuous conductive material filled in the integral through via hole and in physical and electrical contact with the bonding pad of the substrate.
1. A semiconductor device comprising:
a substrate having a bonding pad on a surface of the substrate;
at least two semiconductor components, each semiconductor component having a first surface and a second surface opposite the first surface, the at least two semiconductor components stacked on top of each other on the surface of the substrate via a layer of component attach material attached on the second surface of the respective semiconductor component;
an integral through via hole extending completely through the at least two semiconductor components and the layers of component attach material, and the integral through via hole aligned with the bonding pad on the surface of the substrate, and
a continuous conductive material plated within the integral through via hole and in physical and electrical contact with the bonding pad of the substrate.
2. The semiconductor device of claim 1 , wherein each semiconductor component is either a die or a wafer.
3. The semiconductor device of claim 2 , wherein the die comprises a controller die or a memory die.
4. The semiconductor device of claim 1 , further comprising a continuous metal seed layer disposed on the inner side wall of the integral through via hole.
5. The semiconductor device of claim 1 , further comprising a molding compound encapsulating the at least two semiconductor components stacked on the surface of the substrate.
6. A semiconductor device comprising:
a substrate having a bonding pad on a surface of the substrate, the bonding pad comprising a fiducial mark;
at least two semiconductor components, each semiconductor component having a first surface and a second surface opposite the first surface, the at least two semiconductor components stacked on top of each other on the surface of the substrate based on a position of the fiducial mark;
an integral through via hole extending completely through the at least two semiconductor components, and the integral through via hole aligned with the bonding pad on the surface of the substrate, and
a continuous conductive material filled without gap in the integral through via hole and in physical and electrical contact with the bonding pad of the substrate.
7. The semiconductor device of claim 6 , wherein each semiconductor component is either a die or a wafer.
8. The semiconductor device of claim 7 , wherein the die comprises a controller die or a memory die.
9. The semiconductor device of claim 6 , further comprising a continuous metal seed layer disposed on the inner side wall of the integral through via hole.
10. A semiconductor device comprising:
a substrate having a bonding pad on a surface of the substrate;
at least first and second semiconductor components, each semiconductor component having a first surface and a second surface opposite the first surface, the at least first and second semiconductor components stacked on top of each other, the second semiconductor component lying directly against the surface of the substrate;
an integral through via hole extending completely through the at least two semiconductor components, and the integral through via hole aligned with the bonding pad on the surface of the substrate, and
a continuous conductive electroplated material at least partially filling the integral through via hole and in physical and electrical contact with the bonding pad of the substrate.
11. The semiconductor device of claim 10 , wherein each semiconductor component is either a die or a wafer.
12. The semiconductor device of claim 11 , wherein the die comprises a controller die or a memory die.
13. The semiconductor device of claim 10 , further comprising a continuous metal seed layer disposed on the inner side wall of the integral through via hole.