Multi-level phase change device
Embodiments of the present disclosure generally relate to electronic devices, and more specifically, to multi-level phase change devices. In one embodiment, a memory cell device is provided. The memory cell device generally includes a top surface, a bottom surface and a cell body between the top surface and the bottom surface. The cell body may include a plurality of phase change material layers, which may be used to store data of the cell. In another embodiment, a method of programming a memory cell is provided. The method generally may include applying a sequence of different pulses to each phase change material layer of the cell as the voltage of each pulse in the sequence is ratcheted down from the start of a write cycle to the end of a write cycle.
1. A method for programming a memory cell, comprising:
applying a first pulse at a first voltage to a first phase change material layer of the memory cell;
applying a second pulse at a second voltage to the first phase change material layer of the memory cell, wherein the second voltage is lower than the first voltage, and wherein the first pulse and the second pulse are applied in order to set the memory cell in a first resistance state; and
applying a third pulse at a third voltage to a second phase change material layer of the memory cell, wherein the third voltage is lower than the first voltage and the second voltage, and wherein the third pulse alters the memory cell from the first resistance state to a second resistance state.
2. The method of claim 1 , wherein the first phase change material layer and the second phase change material layer comprise different alloys of the same phase change material.
3. The method of claim 2 , wherein the phase change material comprises any of selenium tellurium (SeTe), silicon tellurium (SiTe), antimony selenide (SbSe), tin selenide (SnSe), tin tellurium (SnTe), tin antimony (SnSb), germanium antimony (GeSb), germanium tellurium (GeTe), and silicon antimony (SiSb).
4. The method of claim 2 wherein a first alloy of the first phase change material layer and a second alloy of the second phase change material layer have different glass transition temperatures, and wherein a glass transition temperature for the first alloy is at least 50 degrees Celsius greater but not more than 200 degrees Celsius greater than a glass transition temperature for the second alloy.
5. The method of claim 1 , wherein the first, the second and the third pulses comprise at least one of a bipolar or unipolar pulse.
6. The method of claim 1 , wherein the duration of the first pulse, the second pulse, and the third pulse is longer than 10 ns and shorter than 10 □s.
7. The method of claim 1 , wherein at least one of the first phase change material layer and the second phase change material layer comprises any of selenium tellurium (SeTe), silicon tellurium (SiTe), antimony selenide (SbSe), tin selenide (SnSe), tin tellurium (SnTe), tin antimony (SnSb), germanium antimony (GeSb), germanium tellurium (GeTe), and silicon antimony (SiSb).
8. The method of claim 7 , wherein a first alloy of the first phase change material layer and a second alloy of the second phase change material layer have different glass transition temperatures, and wherein a glass transition temperature for the first alloy is at least 50 degrees Celsius greater but not more than 200 degrees Celsius greater than a glass transition temperature for the second alloy.
9. The method of claim 1 , wherein a first alloy of the first phase change material layer and a second alloy of the second phase change material layer have different glass transition temperatures, and wherein a glass transition temperature for the first alloy is at least 50 degrees Celsius greater but not more than 200 degrees Celsius greater than a glass transition temperature for the second alloy.