IP Library Granted Patent US 10,438,664
Granted Patent B2
US 10,438,664 · App. 15/435,668 · Granted Oct 8, 2019

Non-volatile storage device with physical authentication

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,438,664
App. No.
15/435,668
Granted
Oct 8, 2019
Kind
B2
Abstract

A non-volatile memory device uses physical authentication to enable the secure programming of a boot partition, when the boot partition is write protected. This physical authentication can also be used to enable other features/functions.

Claims (40)

1. A non-volatile memory apparatus, comprising:

non-volatile memory;

a plurality of external connections for communicating outside of the non-volatile memory apparatus, a first subset of the external connections comprise a host interface that includes a set of signals configured for communication between the non-volatile memory apparatus and a host that is external to the non-volatile memory apparatus, a second subset of the external connections comprise a set of one or more external inputs to the non-volatile memory apparatus, the set of one or more external inputs are outside of the host interface and are not connected to the host or the non-volatile memory; and

a controller connected to the non-volatile memory, the host interface and the set of one or more external inputs;

the controller is configured to provide secure access to a protected function on the non-volatile memory in response to authentication via the set of one or more external inputs that are outside of the host interface, access to the function requires authentication in order for the function to be performed;

to provide the secure access to the function, the controller is configured to:

receive a request from the host via the host interface to perform the function on the non-volatile memory,

test conditions of the set of one or more external inputs that are outside of the host interface to determine if a predetermined sequence of signals has been asserted on the set of one or more external inputs that are outside of the host interface, and

determine that the authentication is successful and perform the function on the non-volatile memory in response to determining that the predetermined sequence of signals has been asserted on the set of one or more inputs that are outside of the host interface.

2. The apparatus of claim 1 , wherein the controller is configured to:

set a flag if an input signal at a first input of the set of one or more external inputs that are outside of the host interface is at a predetermined condition at power-on;

check status of the first input subsequent to power-on to determine if the first input has been changed to a condition other than the predetermined condition; and

perform the function at a current time if the flag is set at the current time and the controller determined that the first input was changed to the condition other than the predetermined condition after determining that the first input was at the predetermined condition at power-on.

3. The apparatus of claim 2 , wherein the controller is configured to:

check the flag and current status of the first input in response to receiving the request to perform the function; and

perform the function if the flag is set and the current status of the first input is a condition other than the predetermined condition.

4. The apparatus of claim 2 , wherein:

the setting of the flag if the input signal at the first input is at the predetermined condition at power-on and the checking the status of the first input subsequent to power-on to provide physical authentication for performing the function;

the controller is configured to receive a command to configure using physical authentication to enable performance of the function; and

the controller configures using physical authentication to enable performance of the function.

5. The apparatus of claim 2 , wherein:

the predetermined condition is the input signal being at ground potential; and

the condition other than the predetermined condition is the first input floating.

6. The apparatus of claim 2 , wherein:

the non-volatile memory includes a boot region; and

the function is programming the boot region after the boot region has been write protected.

7. The apparatus of claim 1 , wherein:

the non-volatile memory includes a boot region;

the function is programming the boot region after the boot region has been permanently write protected; and

the controller is configured to:

set a parameter to implement permanent write protection for a boot region in the non-volatile memory,

receive a request to enable overriding of the permanent write protection for the boot region, and

enable overriding of the permanent write protection for the boot region only if the parameter to implement permanent write protection for the boot region is not already set.

8. The apparatus of claim 1 , wherein:

the non-volatile memory includes a boot region;

the function is programming the boot region;

the controller is configured to set a parameter to implement permanent write protection for the boot region; and

the controller is configured to program the boot region after setting the parameter to implement permanent write protection for the boot region.

9. The apparatus of claim 1 , wherein:

the non-volatile memory and the controller are embedded in the host.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2017
From: SELA, ROTEM; SAPIR, MIKI; LEVI, ENOSH
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 041286/0072 →