IP Library Granted Patent US 10,381,335
Granted Patent B2
US 10,381,335 · App. 15/440,735 · Granted Aug 13, 2019

Hybrid display using inorganic micro light emitting diodes (uLEDs) and organic LEDs (OLEDs)

Inventors: Kenji Sasaki (West Linn, OR); Paul J. Schuele (Washougal, WA); Kurt Ulmer (Vancouver, WA); Jong-Jan Lee (Camas, WA)
Assignee: ehux, Inc.
H01L25/50G09G3/006H01L27/3211H01L27/3225H01L27/3248H01L2224/04105H01L2224/19H01L2224/32225H01L2224/32245H01L2224/73267H01L2227/323H01L2924/15153H01L2933/0033
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Quick Facts
Patent No.
US 10,381,335
App. No.
15/440,735
Granted
Aug 13, 2019
Kind
B2
Abstract

A hybrid light emitting diode (LED) display and fabrication method are provided. The method forms a stack of thin-film layers overlying a top surface of a substrate. The stack includes an LED control matrix and a plurality of pixels. Each pixel is made up of a first subpixel enabled using an inorganic micro LED (uLED), a second subpixel enabled using an organic LED (OLED), and a third subpixel enabled using an OLED. The first subpixel emits a blue color light, the second subpixel emits a red color light, and the third subpixel emits a green color light. In one aspect, the stack includes a plurality of wells in a top surface of the stack, populated by the LEDs. The uLEDs may be configured vertical structures with top and bottom electrical contacts, or surface mount top surface contacts. The uLEDs may also include posts for fluidic assembly orientation.

Claims (123)

1. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate with a plurality of wells formed in a top surface of the thin film stack;

a plurality of pixels formed in the stack, each pixel comprising:

a first subpixel enabled using an inorganic micro LED (uLED) populating a well;

a second subpixel enabled using an organic LED (OLED) populating a well;

a third subpixel enabled using an OLED populating a well;

an LED control matrix configured to selectively enable the LEDs;

an electrical interface matrix layer overlying the stack, connected to each OLED; and

wherein adjacent LEDs are separated by well sidewalls.

2. The display of claim 1 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and,

wherein the third subpixel emits a green color light.

3. The display of claim 1 wherein the uLEDs are gallium nitride (GaN) LEDs.

4. The display of claim 1 wherein the uLEDs are configured with an electrical connection interface selected from the group consisting of vertical structure contacts and surface mount top surface contacts.

5. The display of claim 1 wherein each uLED includes a post.

6. The display of claim 1 wherein the LED control matrix is configured as an active matrix (AM) of control circuits, each control circuit electrically connected to a corresponding LED.

7. The display substrate of claim 1 further comprising:

a light blocking material overlying the well sidewalls.

8. The display of claim 7 wherein the light blocking material is selected from the group consisting of a light absorbing material and a light reflector material.

9. The display of claim 1

wherein each uLED well comprises a bottom surface, sidewalls, a first electrical interface formed on the uLED well bottom surface and connected to the LED control matrix, and a second electrical interface formed on the uLED well bottom surface connected to a reference voltage;

wherein the uLEDs are surface mount uLEDs, each surface mount uLED comprising;

a top surface overlying a corresponding uLED well bottom surface;

a bottom surface;

a first electrical contact formed on the uLED top surface and connected to a corresponding uLED well first electrical interface; and,

a second electrical contact formed on the uLED top surface and connected to a corresponding uLED well second electrical interface.

10. The display of claim 9

wherein each OLED well comprises a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix; and,

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer.

11. The display of claim 9 wherein the first electrical contact of each surface mount uLED is configured as a ring with a first diameter;

wherein the second electrical contact of each surface mount uLED is formed within a first electrical contact ring perimeter;

wherein each uLED well first electrical interface is configured as a partial ring with the first diameter, and having a mouth opening; and,

wherein each uLED well second electrical interface is configured as a trace extending into the mouth of a corresponding first electrical interface partial ring.

12. The display of claim 9 wherein each surface mount uLED top surface is bi-planar with a first level and a second level;

wherein each surface mount uLED first electrical contact is formed on the first level of the top surface;

wherein each surface mount uLED second electrical contact is formed on the second level of the top surface;

wherein each uLED well bottom surface is bi-planar with a first level and a second level;

wherein each uLED well first electrical interface is formed on the uLED well bottom first level; and,

wherein each uLED well second electrical interface is formed on the uLED well bottom second level.

13. The display of claim 1

wherein each OLED well comprises a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix;

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer;

wherein each uLED well comprises a bottom surface, sidewalls, and a first electrical interface formed on the uLED well bottom surface and connected to the LED control matrix;

wherein the uLEDs are vertical structure uLEDs, each vertical structure uLED comprising;

a bottom surface overlying a corresponding uLED well bottom surface;

a top surface;

a first electrical contact formed on the uLED bottom surface and connected to a corresponding uLED well first electrical interface; and,

a second electrical contact formed on the uLED top surface and connected to the electrical interface matrix layer.

14. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate;

a plurality of wells formed in a top surface of the stack;

a light blocking material overlying the well sidewalls;

a plurality of pixels formed in the stack, each pixel comprising:

a first subpixel enabled using an inorganic micro LED (uLED);

a second subpixel enabled using an organic LED (OLED),

a third subpixel enabled using an OLED;

an LED control matrix configured to selectively enable the LEDs;

an electrical interface matrix layer overlying the stack, connected to each OLED; and,

wherein the wells are populated by the LEDs.

15. The display of claim 14 wherein the light blocking material is selected from the group consisting of a light absorbing material and a light reflector material.

16. The display of claim 14 wherein the uLEDs are configured with an electrical connection interface selected from the group consisting of vertical structure contacts and surface mount top surface contacts.

17. The display of claim 14 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and,

wherein the third subpixel emits a green color light.

18. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate;

a plurality of inorganic micro LED (uLED) wells formed in a top surface of the stack, each uLED well comprising a bottom surface, sidewalls, a first electrical interface formed on the uLED bottom surface and connected to the LED control matrix, and a second electrical interface formed on the uLED well bottom surface connected to a reference voltage;

a plurality of pixels formed in the stack, each pixel comprising:

a first subpixel enabled using a uLED;

a second subpixel enabled using an organic LED (OLED);

a third subpixel enabled using an OLED;

an LED control matrix configured to selectively enable the LEDs; and,

an electrical interface matrix layer overlying the stack, connected to each OLED;

wherein the uLEDs are surface mount uLEDs, each surface mount uLED comprising;

a top surface overlying a corresponding uLED well bottom surface;

a bottom surface;

a first electrical contact formed on the uLED top surface and connected to a corresponding uLED well first electrical interface; and,

a second electrical contact formed on the uLED top surface and connected to a corresponding uLED well second electrical interface.

19. The display of claim 18 further comprising:

a plurality of OLED wells formed in the stack, each OLED well comprising a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix; and,

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer.

20. The display of claim 18 wherein the first electrical contact of each surface mount uLED is configured as a ring with a first diameter;

wherein the second electrical contact of each surface mount uLED is formed within a first electrical contact ring perimeter;

wherein each uLED well first electrical interface is configured as a partial ring with the first diameter, and having a mouth opening; and,

wherein each uLED well second electrical interface is configured as a trace extending into the mouth of a corresponding first electrical interface partial ring.

21. The display of claim 18 wherein each surface mount uLED top surface is bi-planar with a first level and a second level;

wherein each surface mount uLED first electrical contact is formed on the first level of the top surface;

wherein each surface mount uLED second electrical contact is formed on the second level of the top surface;

wherein each uLED well bottom surface is bi-planar with a first level and a second level;

wherein each uLED well first electrical interface is formed on the uLED well bottom first level; and,

wherein each uLED well second electrical interface is formed on the uLED well bottom second level.

22. The display of claim 18 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and,

wherein the third subpixel emits a green color light.

23. The display of claim 18 wherein the uLEDs are gallium nitride (GaN) LEDs.

24. The display of claim 18 wherein each uLED includes a post.

25. The display of claim 18 wherein the LED control matrix is configured as an active matrix (AM) of control circuits, each control circuit electrically connected to a corresponding LED.

26. A hybrid light emitting diode (LED) emissive display comprising:

a substrate;

a stack of thin-films overlying a top surface of the substrate;

a plurality of organic LED (OLED) wells formed in the stack, each OLED well comprising a bottom surface, sidewalls, and a first electrode formed on the OLED well bottom surface and connected to the LED control matrix;

a plurality of inorganic micro LED (uLED) wells formed in the stack, each uLED well comprising a bottom surface, sidewalls, and a first electrical interface formed on the uLED well bottom surface and connected to the LED control matrix;

a plurality of pixels formed in the stack, each pixel comprising:

a first subpixel enabled using a uLED;

a second subpixel enabled using an OLED;

a third subpixel enabled using an OLED;

an LED control matrix configured to selectively enable the LEDs;

an electrical interface matrix layer overlying the stack, connected to each OLED;

wherein each OLED comprises an OLED heterostructure, the first electrode from a corresponding OLED well, and a second electrode connected to the electrical interface matrix layer;

wherein the uLEDs are vertical structure uLEDs, each vertical structure uLED comprising;

a bottom surface overlying a corresponding uLED well bottom surface;

a top surface;

a first electrical contact formed on the uLED bottom surface and connected to a corresponding uLED well first electrical interface; and,

a second electrical contact formed on the uLED top surface and connected to the electrical interface matrix layer.

27. The display of claim 26 wherein the first subpixel emits a blue color light;

wherein the second subpixel emits a red color light; and,

wherein the third subpixel emits a green color light.

28. The display of claim 26 wherein the uLEDs are gallium nitride (GaN) LEDs.

29. The display of claim 26 wherein each uLED includes a post.

30. The display of claim 26 wherein the LED control matrix is configured as an active matrix (AM) of control circuits, each control circuit electrically connected to a corresponding LED.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2017
From: SASAKI, KENJI; SCHUELE, PAUL J.; ULMER, KURT; LEE, JONG-JAN
To: ELUX INC.
Reel/Frame 041360/0756 →
Continuity (14)
Continuation In Part 15416882 · Jan 26, 2017
Continuation In Part 15413053 · Jan 23, 2017
Continuation In Part 15412731 · Jan 23, 2017
Continuation In Part 15410195 · Jan 19, 2017
Continuation In Part 15410001 · Jan 19, 2017
Continuation In Part 14749569 · Jun 24, 2015
Continuation In Part 15221571 · Jul 27, 2016
Continuation In Part 15197266 · Jun 29, 2016
Continuation In Part 15190813 · Jun 23, 2016
Continuation In Part 15158556 · May 18, 2016
Continuation In Part 15266796 · Sep 15, 2016
Continuation In Part 14680618 · Apr 7, 2015
Continuation In Part 14530230 · Oct 31, 2014
Related Publication 20170179092A1 · Jun 22, 2017
Cited By (2)
US 12,191,423 US 12,424,599