IP Library Granted Patent US 10,446,497
Granted Patent B2
US 10,446,497 · App. 15/471,726 · Granted Oct 15, 2019

Combined source and base contact for a field effect transistor

Inventors: Dan Grimm (Mesa, AZ); Gregory Dix (Tempe, AZ)
Assignee: MICROCHIP TECHNOLOGY INCORPORATED
H01L23/535H01L21/265H01L21/283H01L21/31111H01L21/31144H01L21/76895H01L25/0655H01L29/4175H01L29/41766H01L29/41775H01L29/66727H01L29/7802H01L24/42H01L24/85H01L27/0922H01L29/0696
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Quick Facts
Patent No.
US 10,446,497
App. No.
15/471,726
Granted
Oct 15, 2019
Kind
B2
Abstract

The present disclosure relates to semiconductor devices. The teachings thereof may be embodied in metal oxide semiconductor field effect transistors (MOSFET) and methods for their manufacture. Some embodiments may include: depositing a base within an epitaxial layer; implanting a source implant extending into the base, wherein the epitaxial layer, the base, and the source implant form a continuous plane surface; depositing an insulating layer on the continuous plane surface forming a gate in contact with both the epitaxial layer and the base; opening a contact groove through the insulating layer to expose a central portion of the source implant; depositing a layer of photoresist on top of the insulating layer above exposed portions of the source implant; patterning a set of stripes in the photoresist, each stripe perpendicular to the contact groove; etching the set of stripes with an etch chemistry selective to the insulating layer; and filling the contact groove with a conductive material creating a base-source contact groove reaching through the insulating layer to the surface of the source implant and comprising a plurality of sections spaced apart from each other reaching through the source implant into the base.

Claims (18)

1. A method for manufacturing a field effect transistor with a transistor cell, the method comprising:

depositing a base within an epitaxial layer;

implanting a source implant extending into the base;

wherein the epitaxial layer, the base, and the source implant form a continuous plane surface;

depositing an insulating layer on the continuous plane surface;

forming a gate in contact with both the epitaxial layer and the base;

opening a contact groove through the insulating layer to expose a central portion of the source implant;

depositing a layer of photoresist on top of the insulating layer above exposed portions of the source implant, wherein the layer of photoresist leaves the contact groove open as well as a surface portion of the source implant immediately adjacent the contact groove;

patterning a set of stripes in the photoresist, each stripe perpendicular to the contact groove;

etching the set of stripes with an etch chemistry selective to the insulating layer; and

filling the contact groove with a conductive material creating a base-source contact groove reaching through the insulating layer to the surface of the source implant having surface area in contact with the surface of the source implant as well as side walls in contact with the source implant and comprising a plurality of sections spaced apart from each other reaching through the source implant into the base.

2. A method according to claim 1 , wherein each of the plurality of sections is equally spaced apart.

3. A method according to claim 1 , wherein the conducting material is metal.

4. A method according to claim 1 , wherein the plurality of sections comprise vias reaching through the source implant into the base.

5. A method according to claim 1 , wherein the plurality of sections each have a rectangular footprint.

6. A method according to claim 1 , wherein the plurality of sections each have a circular footprint.

7. A method according to claim 1 , wherein the base comprises a p-type semiconductor and the source implant comprises an n-type semiconductor.

8. A method according to claim 1 , wherein the field effect transistor comprises a power metal oxide semiconductor field effect transistor.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2017
From: DIX, GREGORY; GRIMM, DAN
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 042107/0918 →
Continuity (2)
Provisional Application 62314870 · Mar 29, 2016
Related Publication 20170287835A1 · Oct 5, 2017