Patent Assignment
Reel/Frame 059358/0335
Release of Security Interest
Recorded: 2022-03-09
Pages: 63
Assignor
WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Executed: 2022-02-28
Assignees
MICROCHIP TECHNOLOGY INCORPORATED
2355 W CHANDLER BLVD, CHANDLER, ARIZONA, 85224
SILICON STORAGE TECHNOLOGY, INC.
2355 W CHANDLER BLVD, CHANDLER, ARIZONA, 85224
ATMEL CORPORATION
2355 W CHANDLER BLVD, CHANDLER, ARIZONA, 85224
MICROSEMI CORPORATION
2355 W CHANDLER BLVD, CHANDLER, ARIZONA, 85224
MICROSEMI STORAGE SOLUTIONS, INC.
2355 W CHANDLER BLVD, CHANDLER, ARIZONA, 85224
Covered Properties
(681)
Method of Detecting a Redirection or Relaying of a Contactless Data Transmission Using at Least Two Sequentially Driven Transmitting Antennas
Patent:
41,843 →
Application:
11/987,422 →
Universal Tuner for Mobile Tv
Patent:
44,551 →
Application:
13/645,471 →
Blue-Tooth Communication System and Broadcasting Method Thereof
Electrode Arrangement for Gesture Detection and Tracking
Analog Switch For Transmitting High Voltage Signals Without Utilizing High Voltage Power Supplies
System Architecture with Secure Data Exchange
System and Method for Reducing Noise in a Sensor System
High Density Split-Gate Memory Cell
Distance Measurement Between Two Nodes of a Radio Network
Message Authentication with Secure Code Verification
Central Processing Unit With DSP Engine And Enhanced Context Switch Capabilities
Regulators with Load-Insensitive Compensations
Electrode Design For Electric Field Measurement System
Method And Apparatus For Configuring Array Columns And Rows For Accessing Flash Memory Cells
Inter-Process Signaling System and Method
Core Independent Peripheral Based Ultrasonic Ranging Peripheral
Capacitance Measurement Device With Reduced Noise
Closed Loop Flux Weakening for Permanent Magnet Synchronous Motors
Touch Sensor Signal Integration
Detection of Defects in Motor Position Decoder System
Method, System And Apparatus For Measuring Multiple Signals In A Body
Proximity Activated Gesture
Method And System For Sensing Impedance Change In The Local Space Between Electrodes
Multi-State Capacitive Button
Single Wire System Clock Signal Generation
Buck-Boost Controller Achieving High Power Factor and Valley Switching
Core Independent Ultrasonic Proximity Sensing Peripheral
Class AB Common-Source Amplifier With Constant Transconductance
High Voltage Transmit / Receive Switch and Voltage Detection Circuit
Address Fault Detection In A Flash Memory System
Water Robustness and Detection On Capacitive Buttons
Combined Source and Base Contact for a Field Effect Transistor
Balanced Battery Charging System
Microcontroller With Digital Delay Line Analog-to-Digital Converter
Hybrid RC/Crystal Oscillator
System Arbiter with Programmable Priority Levels
Continuous Circle Gesture Detection For A Sensor System
Array of Three-Gate Flash Memory Cells With Individual Memory Cell Read, Program and Erase
Digital Temperature Sensor With Integrated Timer And Burst Mode
Compensation Of A Target Objects Coupling To Feeding Lines In Capacitive Sensing System
Automatic Gain Control for Received Signal Strength Indication
Integrated Circuit Crystal Oscillator Having Digital Automatic Gain Control Comprising Oscillation Detection And Amplitude Control Loops
Channel Estimation In OFDM Communication Systems
Blue-Tooth Communication System And Broadcasting Method Thereof
Controlled Adaptive Power Limiter
Time-Based Delay Line Analog Comparator
Three-Dimensional Flash NOR Memory System With Configurable Pins
Wafer Level Package and Method
Scan Logic For Circuit Designs With Latches And Flip-Flops
ADC controller With Temporal Separation
Low Cost Cryptographic Accelerator
Systems and Methods for Managing Power Consumed by a Microcontroller in an Inactive Mode
Systems and Methods for Storing Frequency Information for System Calibration/Trimming
Predictive Thermal Control Management Using Temperature and Power Sensors
Dynamic Programming of Advanced Nanometer Flash Memory
Architectures and Layouts for an Array Of Resistive Random Access Memory Cells and Read and Write Methods Thereof
Non-Volatile Split Gate Memory Cells with Integrated High K Metal Gate Logic Device and Metal-Free Erase Gate, and Method of Making Same
Current Sense Amplifier Architecture and Level Shifter
Gate Drive Control System for Sic and Igbt Power Devices to Control Desaturation or Short Circuit Faults
On Chip NMOS Capless LDO for High Speed Microcontrollers
Anti-Hacking Mechanisms for Flash Memory Device
Multi-Processor Core Device With MBIST
Network Traffic Controller (NTC)
Automatic Transmission of Dummy Bits in Bus Master
Universal Serial Bus Smart Hub
System and Method for Starting Synchronous Motors
Method of Forming a Field-Effect Transistor (FET) or Other Semiconductor Device with Front-Side Source and Drain Contacts
High Precision And Highly Efficient Tuning Mechanisms And Algorithms For Analog Neuromorphic Memory In Artificial Neural Networks
Flexconnect Disconnect Detection
Serial Device with Configuration Mode for Changing Device Behavior
System and Method for Minimizing Floating Gate to Floating Gate Coupling Effects During Programming in Flash Memory
Multiple Channel Capacitive Voltage Divider Scanning Method And Apparatus
Over-Current Protection Apparatus and Method
Voltage Sensing Mechanism to Minimize Short-to-Ground Current for Low Drop-Out and Bypass Mode Regulators
Safety Enhancement for Memory Controllers
Circuits for Bleeding Supply Voltage from a Device in a Power Down State
Devices and Methods for Autonomous Hardware Management of Circular Buffers
Smart Grid Appliance Control
Capacitor Structure with an Extended Dielectric Layer and Method of Forming a Capacitor Structure
Microcontroller with Integrated Interface Enabling Reading Data Randomly from Serial Flash Memory
Non-Volatile Flash Memory Cell
Grounding Techniques for Backside-Biased Semiconductor Dice and Related Devices, Systems and Methods
Fast Transient Response Circuit
Host-Detecting USB Hub
Reference Noise Rejection Improvement Based on Sample and Hold Circuitry
Virtual General Purpose Input/Output For A Microcontroller
Microcontroller with Digital Delay Line Analog-to-Digital Converters and Digital Comparators
Analog-To-Digital Converter with Autonomous Gain Stage and Auto Scaling, and Related Systems and Methods
Patent:
10,298,189 →
Application:
15/901,420 →
Adaptive Common Mode Dimmer
Dynamic Correction Of Gain Error In Current-Feedback Instrumentation Amplifiers
Usb Host-to-Host Auto-Switching
Positioning Components That Provide Resistance on Sense Lines of a Touch Sensor
System, Method, and Apparatus for Touch Panel Security
System And Method For Generating Random Numbers Based On Non-volatile Memory Cell Array Entropy
Touch Sensor with Force Sensor Response Normalization, and Related Method and Apparatus
Time-Based Delay Line Analog-to-Digital Converter With Variable Resolution
Slew Control For High-Side Switch
Code Coverage Tracking for a Microcontroller Program
Sacrificial Alignment Ring And Self-Soldering Vias For Wafer Bonding
Memory Cell With A Flat-Topped Floating Gate Structure
Memory Cell With Asymmetric Word Line And Erase Gate For Decoupled Program Erase Performance
Flash Memory Cell And Associated Decoders
Two Transistor Finfet-Based Split Gate Non-volatile Floating Gate Flash Memory And Method of Fabrication
Patent:
10,312,247 →
Application:
15/933,124 →
Common Mode Sensing Architecture
Semiconductor Package Having Exposed Redistribution Layer Features and Related Methods of Packaging and Testing
Input/Output Parameter Selection
Direct Memory Access Adapter
Method of Forming Split-Gate, Twin-Bit Non-Volatile Memory Cell
Sensing Amplifier Comprising Fully Depleted Silicon-on-Insulator Transistors for Reading a Selected Flash Memory Cell in an Array of Flash Memory Cells
Split Gate Non-Volatile Memory Cells and Logic Devices with Finfet Structure, and Method of Making Same
Systems And Methods For Improved Delamination Characteristics In A Semiconductor Package
Access to Dram Through a Reuse of Pins
Under-voltage and Over-voltage Protection Using a Single Comparator
Current Sensing For Integrated Circuit Devices
Voice-Based Control In A Media System Or Other Voice-Controllable Sound Generating System
Connecting Electrodes to Voltages
Integrity Monitor Peripheral For Microcontroller And Processor Input/Output Pins
Devices and Methods for Prioritizing Transmission of Events on Serial Communication Links
Devices and Methods for Transmission of Events with a Uniform Latency on Serial Communication Links
Feed-forward Function for Voltage Mode Control
Accelerating Antenna Ramp-Down and Related Systems
Memory Pool Allocation for a Multi-Core System
Touchscreen User Interface With Multi-Language Support
Floating Gate Spacer For Controlling A Source Region Formation In A Memory Cell
Techniques for Identifying User Interface Elements and Systems and Devices Using the Same
System, Method, and Apparatus for Obfuscating Device Operations
CAN Transmitter with Fast CANL Control Loop
Force Sensor Mount and Related Housings and Systems That Incorporate the Same
Low-Voltage Crystal Oscillator Circuit Compatible With GPIO
Method And Apparatus For Data Refresh For Analog Non-volatile Memory In Deep Learning Neural Network
Capacitor-Less Low Drop-Out (LDO) Regulator, Integrated Circuit, and Method
Method And Apparatus For Programming Analog Neural Memory In A Deep Learning Artificial Neural Network
Decoders For Analog Neural Memory In Deep Learning Artificial Neural Network
Canceling Unwanted Capacitive Effects in a Capacitive Touch Measurement, and Related Systems, Methods, and Devices
Systems And Methods For Forming A Thin Film Resistor Integrated In An Integrated Circuit Device
Display User Interface, and Related Systems, Methods and Devices
Distributed Amplifier
Method and Apparatus for Phase Current Balancing in Multi-Phase Constant On-Time Buck Converter
Patent:
10,284,095 →
Application:
16/003,369 →
Scramble of Payload and Preamble in 10SPE
Application:
16/007,119 →
Publication:
US 2019/0268452
Scramble of Payload and Preamble in 10SPE with Synchronous and Self-Synchronous Scrambling
Flash Memory Cell with Dual Erase Modes for Increased Cell Endurance
Split-Gate Flash Memory Cell with Improved Read Performance
Parallel Acquisition and Measurement of Capacitive Sensor Channels, and Related Systems, Methods, and Devices
System And Method For Managing Peak Power Demand And Noise In Non-volatile Memory Array
System and Method for Implementing Inference Engine by Optimizing Programming Operation
Touch Sensor and Associated Control Method for Decreased Capacitive Loads
Wireless Signal Source Based Audio Output and Related Systems, Methods and Devices
Application:
16/025,815 →
Publication:
US 2020/0007988
Split Gate Non-Volatile Memory Cells with Three-Dimensional Finfet Structure
Automatic Usb Host Detection and Port Configuration
Thin-Film Resistor (TFR) Formed Under a Metal Layer and Method of Fabrication
Thin-Film Resistor (TFR) Module With Top-Side Interconnects Connected to Reduced TFR Ridges and Manufacturing Methods
Smart Radio Arbiter with Conflict Resolution Based on Timing Predictability
Aluminum Compatible Thin-Film Resistor (TFR) and Manufacturing Methods
Method of Manufacturing Damascene Thin-Film Resistor (Tfr) in Poly-Metal Dielectric
Split-Gate Flash Memory Array with Byte Erase Operation
Method and Apparatus for High Voltage Generation for Analog Neural Memory in Deep Learning Artificial Neural Network
Carbon Monoxide Alarm Supervision
System and Method for Error Correction in Data Communications
Coupled-Inductor Cascaded Buck Converter with Fast Transient Response
Patent:
10,348,205 →
Application:
16/045,158 →
Voice-Activated Actuation of Automotive Features
Application:
16/051,801 →
Publication:
US 2019/0043295
Digital Control of Switched Boundary Mode Interleaved Power Converter with Reduced Crossover Distortion
Digital Control of Switched Boundary Mode Interleaved Power Converter
Digital Control of Switched Boundary Mode Power Converter Without Current Sensor
Systems And Methods For Integrity Checking Of Code Or Data In A Mixed Security System While Preserving Confidentiality
Multi-Phase Parallelable Constant on Time Buck Controller with Phase Interleaving Ensured by Ripple Injection
Method of Making Embedded Memory Device with Silicon-on-Insulator Substrate
Split-Gate Flash Memory Cell With Varying Insulation Gate Oxides, And Method Of Forming Same
Patent:
10,418,451 →
Application:
16/057,750 →
Integrated Circuit (IC) Die Attached Between An Offset Lead Frame Die-Attach Pad And A Discrete Die-Attach Pad
High Performance Multi-Component Electronics Power Module
Data Packet Compensation in Multi-Device Media Systems
Semiconductor device with improved field layer
Base Resistance Cancellation Method and Related Methods, Systems, and Devices
System and Method for Block-Coding Transcoding
System And Method For Implementing Configurable Convoluted Neural Networks With Flash Memories
Spread Acquisition and Measurement of Capacitance Sensors and Related Systems, Methods and Devices
Indirect Packet Classification Timestamping System and Method
Memory Cell With Oxide Cap And Spacer Layer For Protecting A Floating Gate From A Source Implant
Power Mode Configuration for Touch Sensors
Sense Amplifier For A Flash Memory System
Method And Apparatus For Reducing Coupling Between Word Lines And Control Gate Lines In A Flash Memory System
Methods For Writing To An Array Of Resistive Random Access Memory Cells
Application:
16/119,416 →
Publication:
US 2019/0080754
Methods of Reinforcing Integrated Circuitry of Semiconductor Devices and Related Semiconductor Devices and Packages
Enhanced Switching Regulator Topology with Adaptive Duty Control and Seamless Transition of Operating Modes
Method of Manufacturing a Split-Gate Flash Memory Cell with Erase Gate
Five-Level Switched-Capacitance DAC Using Bootstrapped Switches
Stepper Trajectory Driver With Numerical Controlled Oscillators Operated at Frequency Provided by a Synchronized Clock Signal
Peripheral Interface Circuit for Serial Memory
Touch Sensor Compensation Circuit
Fail-Safe Clock Monitor with Fault Injection
Temperature Compensated Clock Frequency Monitor
Analog-To-Digital Converter with Autonomous Gain Stage and Auto Scaling, and Related Systems and Methods
Load Balancing in Multi-Port Power Delivery Applications
System And Method For Storing Multibit Data In Non-volatile Memory
Delta-Sigma Loop Filters with Input Feedforward
Auxiliary Detector Base for Providing Additional Functionality to a Smoke Detector or Other Detector
Compensation For Reference Transistors And Memory Cells In Analog Neuro Memory In Deep Learning Artificial Neural Network
Redundant Memory Access For Rows Or Columns Containing Faulty Memory Cells In Analog Neural Memory In Deep Learning Artificial Neural Network
Angular Rotation Sensor
Integrated Circuit (Ic) Device Including a Force Mitigation System for Reducing Under-Pad Damage Caused by Wire Bond
Programmable Hardware Sleep Cycle Controller For 802.11 Wireless Devices Supporting Low-Power
Fault Tolerant Clock Monitor System
Twin Bit Non-volatile Memory Cells With Floating Gates In Substrate Trenches
Microcontroller Including Power Supply Monitoring
Analog-To-Digital Converter Controllers Including Configurable Contexts
Patent:
10,536,156 →
Application:
16/162,135 →
High Precision Current Sensing Using Sense Amplifier with Digital Az Offset Compensation
Touch-Sensitive User-Interface Including Configurable Virtual Widgets
Touchscreen Including Tactile Feedback Structures and Corresponding Virtual User Interface Elements
Digital Control Of Switched Boundary Mode PFC Power Converter For Constant Crossover Frequency
Non-volatile Split Gate Memory Cells With Integrated High K Metal Control Gates And Method Of Making Same
Method and Apparatus for Enabling Wide Input Common-Mode Range in Sar Adcs with No Additional Active Circuitry
Bit Manipulation Capable Direct Memory Access
Compact Timestamp, Encoders and Decoders That Implement the Same, and Related Devices, Systems and Methods
Method and Apparatus for Offset Correction in Sar Adc with Reduced Capacitor Array Dac
Systems and Methods for Improved Root Mean Square (Rms) Measurement
Shared Radio Arbitration
Current-Based Temperature Measurement Devices and Methods
Adc Self-Test Using Time Base and Current Source
Programmable Receivers Including a Delta-Sigma Modulator
Symmetric Input Circuitry for IC in Two-Pin Package
Method and Assembly for Mitigating Short Channel Effects in Silicon Carbide Mosfet Devices
Configurable Analog Neural Memory System for Deep Learning Neural Network
Analog Neural Memory System for Deep Learning Neural Network Comprising Multiple Vector-by-Matrix Multiplication Arrays and Shared Components
Temperature and Leakage Compensation for Memory Cells in an Analog Neural Memory System Used in a Deep Learning Neural Network
Shaping Traffic on PLCA-Enabled 10SPE Networks
Fast Frequency Calculator
Method and Apparatus for Multimode Wideband Oscillator
Wireless Quiet Enrolment
Method and Apparatus to Measure Self-Capacitance Using a Single Pin
Application:
16/188,588 →
Publication:
US 2019/0086457
Power-on-Reset and Phase Comparator for Chopper Amplifiers
Method and Assembly for Ohmic Contact in Thinned Silicon Carbide Devices
System and Method for Controlling the Performance of Serial Attached Scsi (Sas) Target Devices
Multi Cycle Dual Redundant Angular Position Sensing Mechanism and Associated Method of Use for Precise Angular Displacement Measurement
System and Method for Drift Compensation in Data Communications
Non-volatile Memory Cells With Floating Gates In Dedicated Trenches
Split Gate Non-volatile Memory Cells With FINFET Structure And HKMG Memory And Logic Gates, And Method Of Making Same
FINFET-Based Split Gate Non-volatile Flash Memory With Extended Source Line FINFET, and Method Of Fabrication
Memory Cell with Floating Gate, Coupling Gate and Erase Gate, and Method of Making Same
Method Of Programming A Split-Gate Flash Memory Cell With Erase Gate
System And Method For Storing And Retrieving Multibit Data In Non-volatile Memory Using Current Multipliers
Segmented Capacitive Sensor, and Related Systems, Methods and Devices
Programming Of Memory Cell Having Gate Capacitively Coupled To Floating Gate
Flash Memory System Using Negative High Voltage Level Shifter
Transparently Attached Flash Memory Security
Charge Pump For Use In Non-volatile Flash Memory Devices
Authentication of Files
Touch Device
Activating a Submersible Sensor Based on Electrode Output, and Related Systems, Methods and Devices
Fractional Mirror Ratio Technique for Digital Remote Temperature Sensors, and Related Systems, Methods, and Devices
Anti-Hacking Mechanisms for Flash Memory Device
Method of Clock Gate Analysis for Improved Efficiency of Electronic Circuitry System Designs and Related Systems, Methods and Devices
Precision Tuning for the Programming of Analog Neural Memory in a Deep Learning Artificial Neural Network
Touch Sensor Mode Transitioning
Semiconductor Device Packages with Electrical Routing Improvements and Related Methods
Method and Apparatus for Reducing Output Voltage Ripple in Hysteretic Boost or Buck-Boost Converter
Compensating for Frequency Variation of a Crystal Oscillator and Related Systems, Methods and Devices
Linear Hall Effect Sensors For Multi-Phase Permanent Magnet Motors with PWM Drive
Method Of Forming Pairs Of Three-Gate Non-volatile Flash Memory Cells Using Two Polysilicon Deposition Steps
Application:
16/245,069 →
Publication:
US 2019/0148529
Electrical Energy Loss Detection
Capacitive Flex Sensors
Application:
16/246,579 →
Publication:
US 2020/0064918
Apparatus and Method for Protecting Program Memory for Processing Cores in a Multi-Core Integrated Circuit
Automated Speed Ramp Control of Stepper Motors
Allocation of Buffer Interfaces for Moving Data, and Related Systems, Methods and Devices
Virtual Ground Non-volatile Memory Array
Application:
16/264,349 →
Publication:
US 2019/0164984
Multi-Modulus Frequency Dividers
Patent:
10,581,436 →
Application:
16/270,208 →
Flash Memory Array With Individual Memory Cell Read, Program And Erase
High Density Split-Gate Memory Cell
Application:
16/273,337 →
Publication:
US 2019/0172529
Planar Linear Inductive Position Sensor Having Edge Effect Compensation
Burst Error Tolerant Decoder and Related Systems, Methods, and Devices
Method And System For Touchless Gesture Detection And Hover And Touch Detection
Method Of Making Split Gate Non-volatile Flash Memory Cell
Classifying Comparators Based on Comparator Offsets
System for Converting Neuron Current into Neuron Current-Based Time Pulses in an Analog Neural Memory in a Deep Learning Artificial Neural Network
Power Management For An Analog Neural Memory In A Deep Learning Artificial Neural Network
Precision Programming Circuit for Analog Neural Memory in Deep Learning Artificial Neural Network
Algorithms and Circuitry for Verifying a Value Stored During a Programming Operation of a Non-Volatile Memory Cell in an Analog Neural Memory in Deep Learning Artificial Neural Network
Secure Boot Assist for Devices, and Related Systems, Methods and Devices
Methods of Adjusting Gain Error in Instrumentation Amplifiers
Devices and Methods for Transmission of Events with a Uniform Latency on Serial Communication Links
Devices and Methods for Transmission of Events with a Uniform Latency on Serial Communication Links
Method for Adapting a Constant Bit Rate Client Signal into the Path Layer of a Telecom Signal
Hermetic Package for Power Semiconductor
Programmable Arbitrary Sequence Direct Memory Access Controller for Configuring Multiple Core Independent Peripherals
Dual Measurement for High Sensitivity Capacitive Sensing Applications and Related Systems, Methods and Devices
Digital-To-Analog Controller-Referenced Touch Sensing System, and Related Systems, Methods, and Devices
Neural Network Classifier Using Array of Two-Gate Non-Volatile Memory Cells
Neural Network Classifier Using Array Of Four-Gate Non-volatile Memory Cells
Neural Network Classifier Using Array Of Three-Gate Non-volatile Memory Cells
Neural Network Classifier Using Array of Stacked Gate Non-Volatile Memory Cells
Memory Device And Method For Varying Program State Separation Based Upon Frequency Of Use
Method and Apparatus for Scatter Gather Processing Engine in a Storage Controller for Caching Applications
Array Of Three-Gate Flash Memory Cells With Individual Memory Cell Read, Program And Erase
Charge-Based Digital to Analog Converter with Second Order Dynamic Weighted Algorithm
Reram Memory Cell Having Dual Word Line Control
Reram Programming Method Including Low-Current Pre-Programming for Program Time Reduction
Lut-Based Focused Ion Beam Friendly Fill-Cell Design
Patent:
10,735,004 →
Application:
16/408,096 →
Multi-Mode Low Current Dual Voltage Self-Regulated Lcd Pump System
Operational Amplifier with Controllable Output Modes
Method And Apparatus For Data Refresh For Analog Non-volatile Memory In Deep Learning Neural Network
Method And Apparatus For Configuring Array Columns And Rows For Accessing Flash Memory Cells
Method Of Making Split Gate Non-Volatile Memory Cells With Three-Dimensional FINFET Structure, And Method Of Making Same
Adaptive Slope Compensation for Current Mode Control
Performing PHY-Level Hardware Timestamping and Time Synchronization in Cost-Sensitive Environments
Systems and Devices for Controlling Use of a Consumable Item with User Devices, and Related Systems, Methods, and Devices
Application:
16/442,205 →
Publication:
US 2020/0195695
Reverse Power Feed (Rpf) Power Supply Unit (Psu) and Associated Method of Use
Space Efficient High-Voltage Termination and Process for Fabricating Same
Method for Providing Path Signal Overhead in the 64B/66B Character Stream of an Itu-T Metro Transport Network
Patent:
10,797,816 →
Application:
16/446,576 →
Configurable Input Blocks and Output Blocks and Physical Layout for Analog Neural Memory in Deep Learning Artificial Neural Network
Output Array Neuron Conversion and Calibration for Analog Neural Memory in Deep Learning Artificial Neural Network
Forming a Thin Film Resistor (Tfr) in an Integrated Circuit Device
Decoding System and Physical Layout for Analog Neural Memory in Deep Learning Artificial Neural Network
Adaptive Power Measurement Accumulator with a Changing Sampling Frequency
Metal Filament Reram Cell with Current Limiting During Program and Erase
Power Line Compensation for Flash Memory Sense Amplifiers
Dual Input LDO Voltage Regulator
Touch Sensor Hand-Configuration Analysis
Applying a Signal to a Touch Sensor
Time-based, Current-Controlled Paired Oscillator Analog-to-Digital Converter with Selectable Resolution
Shared Source Line Memory Architecture for Flash Cell Byte-Alterable High Endurance Data Memory
Mixed-Orientation Multi-Die Integrated Circuit Package with at Least One Vertically-Mounted Die
Flash Memory Cell Adapted for Low Voltage and/or Non-Volatile Performance
Touch Sensor and Associated Control Method for Decreased Capacitive Loads
Techniques for Making Integrated Inductors and Related Semiconductor Devices, Electronic Systems, and Methods
Dynamic Modification Of Programming Duration Based On Number Of Cells To Be Programmed In Analog Neural Memory Array In Deep Learning Artificial Neural Network
Adjustable Current Sink to Draw Compensation Current from High Voltage Generation Circuitry During Programming Operation of Analog Neural Memory in Deep Learning Artificial Neural Network
Current Compensation Block and Method for Programming Analog Neural Memory in Deep Learning Artificial Neural Network
Adaptive High Voltage Circuitry and Methods for Programming Operations in an Analog Neural Memory Array in a Deep Learning Artificial Neural Network
Virtual Ports for Connecting Core Independent Peripherals
Address Fault Detection In A Flash Memory System
Communication Device and System with Ground Potential Difference Compensation
Phase Predictor and Associated Method of Use
Method for Providing Path Signal Overhead in the 64B/66B Character Stream of an Itu-T Metro Transport Network Using Micro-Packets
Control of Four-Switch, Single Inductor, Non-Inverting Buck-Boost Converters
Microcontroller with Configurable Logic Peripheral
Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural Network
Testing Circuitry And Methods For Analog Neural Memory In Artificial Neural Network
Programming Circuit and Method For Flash Memory Array
Keyboard for Secure Data Entry
Method Of Making Split Gate Non-volatile Flash Memory Cell
Method Of Making Split Gate Non-volatile Flash Memory Cell
Method Of Making Split Gate Non-volatile Flash Memory Cell
Precision Tuning for the Programming of Analog Neural Memory in a Deep Learning Artificial Neural Network
System for Improved Evaluation of Semiconductor Hardware and Corresponding Method
Split Gate Non-volatile Memory Cells And Logic Devices With FINFET Structure, And Method Of Making Same
Line Discharge Circuit with Low Power Components
Detecting Collisions on a Network
Hybrid RC/Crystal Oscillator
Interface for Improved Media Access, and Related Systems, Methods, and Devices
Transceiver and Driver Architecture with Low Emission and High Interference Tolerance
Fast Initial Phase Search for Digital Clock and Data Recovery and Related Systems, Devices, and Methods
Diagnosing Cable Faults Within a Network
Signal to Noise Ratio and Bit Error Rate Estimation for Wired Local Area Networks and Related Systems, Devices, and Methods
Error Tolerant Memory Array and Method for Performing Error Correction in a Memory Array
Apparatus and Method for Controlling Multi-Actuator Hard Disk Drives
Application:
16/588,976 →
Publication:
US 2021/0064239
Method And Apparatus For Data Refresh For Analog Non-volatile Memory In Deep Learning Neural Network
Wake Detection at Controller for Physical Layer of Single Pair Ethernet Network, and Related Systems, Methods and Devices
Application:
16/591,294 →
Publication:
US 2021/0055963
Single Event Upset Immune Flip-Flop Utilizing a Small-Area Highly Resistive Element
Patent:
10,819,318 →
Application:
16/595,096 →
Calibrated Ripple Injection-Based Constant on-Time Buck Converter with Pre-Bias Startup in Continuous Conduction Mode
Patent:
10,797,598 →
Application:
16/601,640 →
Physical Layer to Link Layer Interface and Related Systems, Mtehods and Devices
Bit Error Rate Estimation and Error Correction and Related Systems, Methods, Devices
Configurable Access Controller, and Related Systems, Methods, and Devices
Application:
16/654,807 →
Publication:
US 2020/0410794
Constant on-Time Buck Converter with Calibrated Ripple Injection Having Improved Light Load Transient Response and Reduced Output Capacitor Size
Self-Biased Non-Isolated Low-Power Switching Regulator
Patent:
10,778,080 →
Application:
16/657,301 →
Current Control for Buck-Boost Converters Using Conditional Offsets
Media Access for Time-Sensitive and Best Efforts Data Packets, and Related Systems, Methods and Devices
Multi-Channel Remote Temperature Monitor
Apparatus and Method for Incorporating Multi-Actuator Hard Disk Drives into Traditional Raid Arrays
Application:
16/678,810 →
Publication:
US 2021/0124641
Systems and Methods for Monitoring Copper Corrosion in an Integrated Circuit Device
Ethernet Interface and Related Systems Methods and Devices
Ethernet Interface and Related Systems, Methods and Devices
Data Packet Compensation in Multi-Device Media Systems
Real-Time Resistance Estimation and Adjustment for Permanent Magnet Synchronous Machines
Vibration-Based Tracking System
Magnetic-Based Tracking System
Surface-Mount Integrated Circuit Package with Coated Surfaces for Improved Solder Connection
Surface-Mount Integrated Circuit Package with Coated Surfaces for Improved Solder Connection
Method Of Forming A Device With Split Gate Non-volatile Memory Cells, HV Devices Having Planar Channel Regions And FINFET Logic Devices
Application:
16/724,010 →
Publication:
US 2021/0193671
GATE DRIVE CONTROL METHOD FOR SiC AND IGBT POWER DEVICES TO CONTROL DESATURATION OR SHORT CIRCUIT FAULTS
Wireless Power Transfer Based on Transmitter Coil Voltage Sensing
Analog-To-Digital Converter Controllers Including Configurable Contexts
Level Shifter For Integrated Circuit
Patent:
10,804,902 →
Application:
16/732,047 →
Multi-Modulus Frequency Dividers
Metal-Insulator-Metal (Mim) Capacitor
USB Hub with Integrated Power and Thermal Management
Analog Neural Memory System for Deep Learning Neural Network Comprising Multiple Vector-by-Matrix Multiplication Arrays and Shared Components
Programming Methods For Neural Network Using Non-volatile Memory Array
Voice-Based Control in a Media System or Other Voice-Controllable Sound Generating System
Changing a Master Node in a Wired Local Area Network and Related Systems, Methods, and Devices
Precise Programming Method And Apparatus For Analog Neural Memory In An Artificial Neural Network
Techniques for Identifying User Interface Elements and Systems and Devices Using the Same
Smart Radio Arbiter with Conflict Resolution Based on Timing Predictability
Managing Power at a Station via a Physical Layer Device and Related Systems, Methods and Devices
Method Of Forming Split Gate Memory Cells With Thinned Tunnel Oxide
Patent:
11,018,147 →
Application:
16/781,798 →
System and Method for Minimizing Floating Gate to Floating Gate Coupling Effects During Programming in Flash Memory
Four Gate, Split-Gate Flash Memory Array with Byte Erase Operation
Self-Aligned Implants for Silicon Carbide (Sic) Technologies and Fabrication Method
Memory Controller and Method for Decoding Memory Devices with Early Hard-Decode Exit
Method Of Forming Split-Gate Flash Memory Cell With Spacer Defined Floating Gate And Discretely Formed Polysilicon Gates
Dual Polarity Mutual Capacitive Liquid Sensing
Method of Improving Read Current Stability in Analog Non-Volatile Memory Using Final Bake in Predetermined Program State
Method of Improving Read Current Stability in Analog Non-Volatile Memory by Limiting Time Gap Between Erase and Program
Interfacing with a One-Wire Device That Is in Parallel with a Low-Impedance Element, and Related Systems and Devices
Method Of Forming A Device With FINFET Split Gate Non-volatile Memory Cells And FINFET Logic Devices
Security of Embedded Devices Through a Device Lifecycle with a Device Identifier
Non-volatile Memory Device With Stored Index Information
Packaged Semiconductor Die with Micro-Cavity
Thermal Management Package and Method
Daisy-Chained Synchronous Ethernet Clock Recovery
Circuit to Correct Phase Interpolator Rollover Integral Non-Linearity Errors
Method of Improving Read Current Stability in Analog Non-Volatile Memory Cells by Screening Memory Cells
Precise Data Tuning Method and Apparatus for Analog Neural Memory in an Artificial Neural Network
Circuitry to Compensate for Data Drift in Analog Neural Memory in an Artificial Neural Network
Message Authentication with Secure Code Verification
Techniques for Forming Integrated Inductor-Capacitor Oscillators and Related Methods, Oscillators, Semiconductor Devices, Systems-on-Chips, and Other Systems
Low Voltage Level Shifter For Integrated Circuit
N-Channel Serial Peripheral Communication, and Related Systems, Methods and Devices
Memory Pool Allocation for a Multi-Core System
Emulating Collisions in Wired Local Area Networks and Related Systems, Methods, and Devices
Digital Demodulation for Wireless Power Transfer and Related Systems, Methods, and Devices
Converters for Wireless Power Transfer and Related Systems, Methods, and Devices
Measuring Circuit Using Switched Capacitors for Measuring Voltage and Related Systems, Methods, and Devices
Low Power Object Detection in Multi-Coil Wireless Charging Systems and Related Systems, Methods, and Devices
Circuit and Methods for Transferring a Phase Value Between Circuits Clocked by Non-Synchronous Clock Signals
Patent:
10,972,084 →
Application:
16/867,468 →
Method of Forming Split Gate Memory Cells
Flash Memory Cell and Associated High Voltage Row Decoder
Ratiometric Gain Error Calibration Schemes for Delta-Sigma ADCs with Capacitive Gain Input Stages
Ratiometric Gain Error Calibration Schemes for Delta-Sigma ADCs with Programmable Gain Amplifier Input Stages
Circuits for Bleeding Supply Voltage from a Device in a Power Down State
Universal Serial Bus Smart Hub
Application:
16/899,902 →
DMA-Scatter and Gather Operations for Non-Contiguous Memory
Method Of Forming Split Gate Memory Cells With Thinned Side Edge Tunnel Oxide
Method of Improving Read Current Stability in Analog Non-Volatile Memory by Program Adjustment for Memory Cells Exhibiting Random Telegraph Noise
Method and System for Reliable and Secure Memory Erase
Host-Detecting USB Hub
Precision Tuning for the Programming of Analog Neural Memory in a Deep Learning Artificial Neural Network
Angular Position Sensor and Associated Method of Use
Temperature Compensation for Memory Cells in an Analog Neural Memory System Used in a Deep Learning Neural Network
Excitation Voltages for Touch Sensors
Analog Switch For Transmitting High Voltage Signals Without Utilizing High Voltage Power Supplies
Timer Circuit with Autonomous Floating of Pins and Related Systems, Methods, and Devices
Selectable Input Buffers of General Purpose Inputs and Microcontrollers Having the Same
Techniques for Wideband Touch Sensing and Related Systems, Methods and Devices
Knob on Display Devices and Related Systems, Methods, and Devices
Base Assemblies for Knob on Display Devices and Related Systems, Methods, and Devices
Grounding Techniques for Backside-Biased Semiconductor Dice and Related Devices, Systems and Methods
Pre-Processing of Data Using Autonomous Memory Access and Related Systems, Methods, and Devices
Voltage Converters with Hysteretic Control
System Architecture with Secure Data Exchange
Mutual Authentication Protocol for Systems with Low-Throughput Communication Links, and Devices for Performing the Same
Autonomous Transmit Error Detection of Serial Communication Link Receiver-Transmitter and Microcontroller System Peripherals Implementing the Same
Techniques for Routing Signals Using Inactive Sensor Regions of Touch Sensors and Related Systems and Devices
Low Cost Cryptographic Accelerator
Motor-Current Control Process for Permanent-Magnet Synchronous Motors and Related Systems, Methods and Devices
Synchronization of Sequence Numbers in a Network
Foreign Object Detection in Wireless Charging Systems and Related Systems, Methods, and Devices
Touch Sensor Signal Integration
Ovens for Atomic Clocks and Related Methods
Patent:
11,166,342 →
Application:
16/949,222 →
Ultra-Precise Tuning of Analog Neural Memory Cells in a Deep Learning Artificial Neural Network
Systems and Methods for Provisioning Wi-Fi Devices
Application:
16/986,447 →
Publication:
US 2021/0251019
Analog Neural Memory Array in Artificial Neural Network with Substantially Constant Array Source Impedance with Adaptive Weight Mapping and Distributed Power
Analog Neural Memory Array Storing Synapsis Weights in Differential Cell Pairs in Artificial Neural Network
Daisy Chain Mode Entry Sequence
Daisy Chain Streaming Mode
Daisy Chain Complex Commands
Metal-Insulator-Metal (Mim) Capacitor
Method Of Making Embedded Memory Device With Silicon-On-Insulator Substrate
Wear Leveling in Eeprom Emulator Formed of Flash Memory Cells
Pulse-Width Modulation and Arbitration for Contextual and Uniform Led Illumination in Usb Applications
Systems and Methods for Improved Root Mean Square (Rms) Measurement
Integrated Circuit (IC) Device Including A Force Mitigation System For Reducing Under-Pad Damage Caused By Wire Bond
Method of Forming a Three-Gate Non-Volatile Flash Memory Cell Using Two Polysilicon Deposition Steps
System and Method for Data Sampler Drift Compensation
Patent:
10,972,249 →
Application:
17/022,480 →
Precision Tuning of a Page or Word of Non-Volatile Memory Cells and Associated High Voltage Circuits for an Analog Neural Memory Array in an Artificial Neural Network
EtherCAT Controllers
Low Cost Power Line Modem
Near Constant Delay Comparator for Closed-Loop System
Finfet Split Gate Non-Volatile Memory Cells with Enhanced Floating Gate to Floating Gate Capacitive Coupling
Thin Film Resistor (Tfr) Formed in an Integrated Circuit Device Using Wet Etching of a Dielectric Cap
Thin Film Resistor (Tfr) Formed in an Integrated Circuit Device Using Tfr Cap Layer(S) as an Etch Stop and/or Hardmask
Thin Film Resistor (Tfr) Formed in an Integrated Circuit Device Using an Oxide Cap Layer as a Tfr Etch Hardmask
Non-Volatile Memory System Using Strap Cells in Source Line Pull Down Circuits
Integrated Circuit (Ic) Package with Integrated Inductor Having Core Magnetic Field (B Field) Extending Parallel to Substrate
System and Method for Monitoring Analog Front-End (Afe) Circuitry of an Inductive Position Sensor
System and Method for Auto-Recovery in Lockstep Processors
Charge Pump for Use in Non-Volatile Flash Memory Devices
Analog Neural Memory Array in Artificial Neural Network Comprising Logical Cells and Improved Programming Mechanism
Obfuscating Cryptographic Parameters Used in Elliptical Curve Cryptography, and Related Systems and Devices
Regression Neural Network for Identifying Threshold Voltages to be Used in Reads of Flash Memory Devices
Analog Neural Memory Array in Artificial Neural Network with Source Line Pulldown Mechanism
Self-Timed Sensing Architecture for a Non-Volatile Memory System
Temperature Compensation in an Analog Memory Array by Changing a Threshold Voltage of a Selected Memory Cell in the Array
Method and Apparatus for Phase Current Balancing in a Multi-Phase Dc-to-Dc Converter
Application:
17/101,498 →
Publication:
US 2021/0367519
Word Line and Control Gate Line Tandem Decoder for Analog Neural Memory in Deep Learning Artificial Neural Network
Method and System for Enhanced Spi Communication
Machine Learning Based Methods and Apparatus for Integrated Circuit Design Delay Calculation and Verification
Backside Interconnect for Integrated Circuit Package Interposer
Application:
17/111,973 →
Publication:
US 2021/0335627
Integrated Inductor with a Stacked Metal Wire
Input and Digital Output Mechanisms for Analog Neural Memory in a Deep Learning Artificial Neural Network
Verifying or Reading a Cell in an Analog Neural Memory in a Deep Learning Artificial Neural Network
Method for forming hermetic package for a power semiconductor
Method Of Making Memory Cells, High Voltage Devices And Logic Devices On A Substrate
Transparently Attached Flash Memory Security
Input and Digital Output Mechanisms for Analog Neural Memory in a Deep Learning Artificial Neural Network
METHOD FOR ERASING A ReRAM MEMORY CELL
Adaptive Bias Decoder to Provide a Voltage to a Control Gate Line in an Analog Neural Memory Array in Artificial Neural Network
Method, System and Apparatus for Constant, High Switching Frequency and Narrow Duty Ratio Pwm Control of Dc-Dc Converters and Accurate Pfm Control at Light Load
Redundant Angular Position Sensor and Associated Method of Use
Systems and Methods for Detecting Forcer Misalignment in a Wafer Prober
Partitionable Neural Network for Solid State Drives
System and Method for Scheduling Sharable Pcie Endpoint Devices
Method of Forming a Device with Planar Split Gate Non-Volatile Memory Cells, High Voltage Devices and Finfet Logic Devices
Split Gate Non-Volatile Memory Cells, Hv and Logic Devices with Finfet Structures, and Method of Making Same
Application:
17/152,441 →
Publication:
US 2022/0139940
Split-Gate, 2-Bit Non-Volatile Memory Cell with Erase Gate Disposed Over Word Line Gate, and Method of Making Same
Three-Dimensional Metal-Insulator-Metal (Mim) Capacitor
Heads-Up Display Using Electrochromic Elements
Integrated Circuit Bond Pad with Multi-Material Toothed Structure
Method, System and Apparatus for Suppressing Controller Area Network Bus Ringing
Split-Gate Non-Volatile Memory Cells with Erase Gates Disposed Over Word Line Gates, and Method of Making Same
Thin-Film Resistor (Tfr) with Improved Contacts
Interfacing a Number of Serial Communication Interfaces with a Parallel Communication Interface, and Related Systems, Methods, and Apparatuses
Burn-In Board Including Strip Socket with Integrated Heating for High Volume Burn-in of Semiconductor Devices
Base Assemblies Having Conductive Pads for Knob on Display Devices and Related Systems, Methods, and Devices
Virtual Ground Non-Volatile Memory Array
Method Of Forming Split Gate Memory Cells With Thinner Tunnel Oxide
Output Circuits for an Analog Neural Memory System for Deep Learning Neural Network
Method Of Making Memory Cells, High Voltage Devices And Logic Devices On A Substrate With Silicide On Conductive Blocks
Precise Data Tuning Method and Apparatus for Analog Neural Memory in an Artificial Neural Network
Concurrent Write and Verify Operations in an Analog Neural Memory
Programming Analog Neural Memory Cells in Deep Learning Artificial Neural Network
Low-Latency Macsec Authentication
Methods and Systems for Determining a Noise-Robust Acquisition Configuration for Operating a Sensor System
DC-DC Converter With Improved Line Transient Rejection
Set-While-Verify Circuit And Reset-While Verify Circuit For Resistive Random Access Memory Cells
Architectures for Storing and Retrieving System Data in a Non-Volatile Memory System
Method and apparatus for determining when actual wear of a flash memory device differs from reliability states for the flash memory device
Digital Output Mechanisms for Analog Neural Memory in a Deep Learning Artificial Neural Network
Application:
17/219,352 →
Publication:
US 2022/0215239
Automatic Threshold Adjustment for USB Power Delivery to Work with Cables Out of Specification
Thin-Film Resistor (Tfr) Having a Tfr Element Providing a Diffusion Barrier for Underlying Tfr Heads
Integrated Circuit E-Fuse Having an E-Fuse Element Providing a Diffusion Barrier for Underlying E-Fuse Terminals
Thin-Film Resistor (Tfr) with Displacement-Plated Tfr Heads
Electronic Fuse (E-Fuse) with Displacement-Plated E-Fuse Terminals
Application:
17/233,367 →
Publication:
US 2022/0165530
Method and Apparatus for Reading a Flash Memory Device
Flash Memory Cell and Associated High Voltage Row Decoder
System and Method for Synchronizing Nodes in a Network Device
Systems and Methods to Remove Input Voltage Dependency in a Power Converter
Front-End Circuitry for a Data Receiver and Related Systems, Methods, and Devices
Electrical Energy Loss Detection
Sensors, Autonomous Sensors and Related Systems, Methods and Devices
Recognizing an Object Using Capacitive Sensing
Multi-Bias Mode Current Conveyor, Configuring a Multi-Bias Mode Current Conveyor, Touch Sensing Systems Including a Multi-Bias Mode Current Conveyor, and Related Systems, Methods and Devices
Low Connection Count Interface Wake Source Communication According to 10SPE Local and Remote Wake and Related Systems, Methods, and Devices
Circuitry for Autonomously Measuring Analog Signals and Related Systems, Methods, and Devices
Provisioning Headless Wifi Devices and Related Systems, Methods and Devices
Amplified Charge Cancellation in a Touch Sensor, and Related Systems, Methods, and Devices
Semiconductor Device Packages Including Multiple Lead Frames and Related Methods
Application:
17/301,864 →
Publication:
US 2022/0189858
Metal-Oxide-Metal (Mom) Capacitors for Integrated Circuit Monitoring
Metal-Insulator-Metal (Mim) Capacitor and Thin-Film Resistor (Tfr) Formed in an Integrated Circuit Structure
Lead Frames for Semiconductor Packages with Increased Reliability and Related Semiconductor Device Packages and Methods
Security System Housing
Patent:
571,244 →
Application:
29/283,233 →
Security System Housing
Patent:
634,229 →
Application:
29/306,747 →
Pedestal Mount for Security Camera
Patent:
618,269 →
Application:
29/306,748 →
Mobile Security System Housing
Patent:
678,792 →
Application:
29/379,049 →
Hand Held Scanner
Patent:
663,634 →
Application:
29/385,707 →
Security System Portal
Patent:
662,221 →
Application:
29/385,710 →
Fault Event Detection at a Chip and Implementing the Same
Application:
62/704,894 →
Capacitive Liquid Level Sensor Using True Simultaneous Differential Acquisition in Push Pull Mode
Application:
62/704,895 →
Synchronization of Edge Elements
Application:
62/704,921 →
Efficient Data Integrity Methods and Systems
Application:
62/705,194 →
Circuitry for Autonomously Measuring Analog Signals and Related Systems, Methods, and Devices
Application:
62/705,234 →
Io Buffer Input Circuit with Logic Level Recognition and Improved Static Current Immunity
Application:
62/705,384 →
Time-Synchronized I2S Hardware Controller
Application:
62/705,653 →
Ovens for Atomic Clocks and Related Methods
Application:
62/706,080 →
Bias Mode Auto Selection of Current Conveyor, Touch Sensing Systems Including Current Conveyors Biased Using the Same, and Related Systems Methods and Devices
Application:
62/706,106 →
Programmable Signal Detection of a Lockout Circuit, and Related Systems Methods and Devices
Application:
62/706,197 →
Low Processing Power Frequency Shift Keying Demodulation for Wireless Power and Related Systems, Methods, and Devices
Application:
62/706,464 →
Autonomous Core Independent Discrete Signal Slew Rate Sensors
Application:
62/706,486 →
Measurement of Capacitive Sensors Capactively Influenced by a High-Impedance Material, and Related Systems, Methods and Devices
Application:
62/706,704 →
Aggregation of Data in Communication Between Edge Devices and a Controller
Application:
62/706,792 →
Circuit to Correct Phase Interpolator Rollover Integral Non-Linearity Errors
Application:
62/952,201 →
Implant Scheme for Silicon Carbide (Sic) Technologies and Fabrication Method
Application:
62/962,871 →
Display Using Transparent Electrochromic Elements
Application:
62/968,864 →
Systems and Methods for Provisioning Wi-Fi Devices
Application:
62/972,250 →
Measuring Circuit Using Switched Capacitors for Measuring Voltage and Related Systems, Methods, and Devices
Application:
62/975,556 →
Low Cost Power Line Modem
Application:
62/976,422 →
Systems and Methods for High Volume Burn-in of Semiconductor Devices Using a Socket with Integrated Heating
Application:
62/977,779 →
Metal-Insulator-Metal (Mim) Capacitor
Application:
62/980,485 →
Ultra-Precise Tuning of Analog Neural Memory Cells in a Deep Learning Artificial Neural Network
Application:
62/981,757 →
Thin Film Resistor (Tfr) Formed in an Integrated Circuit Device Using a Wet Etch of a Dielectric Cap Layer
Application:
62/982,107 →
Synchronization of Sequence Numbers
Application:
62/982,654 →
Thin Film Resistor (Tfr) Formed in an Integrated Circuit Device Using an Etch Stop Cap Over the Tfr Film
Application:
62/982,905 →
Thin Film Resistor (Tfr) Formed in an Integrated Circuit Device Using an Oxide Cap Layer as a Hardmask for a Tfr Etch
Application:
62/983,821 →
Interfacing a Number of Serial Communication Interfaces with a Parallel Communication Interface, and Related Systems, Methods, and Apparatuses
Application:
62/984,086 →
Low Power Object Detection in Multi-Coil Wireless Charging Systems and Related Systems, Methods, and Devices
Application:
62/984,722 →
Analog Neural Memory Array in Artificial Neural Network with Accurate Array Source Impedance with Adaptive Weight Mapping and Distributed Power
Application:
62/985,826 →
Low-Latency MACsec Authentication
Application:
62/990,003 →
Precision Tuning of a Page or Word of Non-Volatile Memory Cells and Associated High Voltage Circuits for an Analog Neural Memory Array in an Artificial Neural Network
Application:
62/993,008 →
Low Pin Count Handshake Signaling Protocol According to 10BASE-T1X Local and Remote Wake Detect and Related Systems, Methods, and Devices
Application:
62/993,825 →
Method and System for Enhanced Spi Communication
Application:
62/993,959 →
Finfet Split Gate Non-Volatile Memory Cells with Enhanced Float Gate to Floating Gate Capacitive Coupling
Application:
62/994,187 →
Recognizing a Non-Grounded Object Using Mutual-Capacitive Sensing
Application:
63/001,097 →
Near Constant Delay Comparator for Closed-Loop System
Application:
63/007,843 →
Amplified Charge Cancellation in Touch Sensor, and Related Systems Methods and Devices
Application:
63/013,721 →
Backside Interconnect for Integrated Circuit Package Interposer
Application:
63/014,667 →
Analog Neural Memory Array in Artificial Neural Network with Source Line Pulldown Mechanism
Application:
63/022,551 →
Analog Neural Memory Array in Artificial Neural Network Comprising Logical Cells and Improved Programming Mechanism
Application:
63/024,351 →
Multiplier Topology with Input Voltage Dependency Cancellation
Application:
63/025,120 →
Charge Pump Cell with Improved Latch-Up Immunity and Charge Pumps Including the Same, and Related Systems, Methods and Devices
Application:
63/026,435 →
Programable Data Receiver Front Ends Having Passive Equalizers and Related Systems, Methods, and Devices
Application:
63/027,152 →
Self-Timed Sensing Architecture for a Non-Volatile Memory System
Application:
63/027,472 →
Method and Apparatus for Phase Current Balancing in a Multi-Phase Voltage Mode Controlled Buck Converter
Application:
63/028,461 →
Integrated Circuit having Lockstep Processors with Auto-Recovery and Method for Auto-Recovery
Application:
63/030,201 →
System and method for enabling time-based scheduling of a PCIe endpoint device between multiple host computing machines using a PCIe switch
Application:
63/033,216 →
Word Line and Control Gate Line Tandem Decoder for Analog Neural Memory in Deep Learning Artificial Neural Network
Application:
63/033,953 →
Integrated Circuit (Ic) Package with Integrated Inductor Formed from a Triple Stack of Metal Layers
Application:
63/034,547 →
Adaptive Bias Decoder for Analog Neural Memory Array in Artificial Neural Network with Source Line Pulldown Mechanism
Application:
63/048,470 →
Method Of Forming Split Gate Memory Cells With Thinner Tunnel Oxide
Application:
63/049,775 →
Method, System and Apparatus for Constant, High Switching Frequency and Very Narrow Duty Ratio Pwm Control of Dc-Dc Converters and Accurate Pfm Control at Light Load
Application:
63/052,525 →
Method and System for Noise Immunity for Automatically Triggered Impedance and Capacitance Sensors
Application:
63/052,838 →
Process-tolerant averaging-based daisy-chain routing technique for multi-point synchronization and latency-removal
Application:
63/055,228 →
Regression Neural Network for Identifying Threshold Voltages to be Used in Reads of Flash Memory Devices
Application:
63/057,278 →
System and Method for Monitoring Analog Front-End (Afe) Circuitry of an Inductive Position Sensor
Application:
63/058,720 →
Method and Apparatus for Envelope Tracking of Amplifier Supply Voltage for Minimizing Power Dissipation
Application:
63/062,675 →
3D Toothed Bond Pads for Heterogeneous Die Ingetration in an Integrated Circuit (Ic) Structure
Application:
63/064,958 →
Partitionable Neural Network for Solid State Drive
Application:
63/068,349 →
Concurrent Write and Verify Operations in an Analog Neural Memory
Application:
63/070,051 →
Three-Dimensional Metal-Insulator-Metal (Mim) Capacitor
Application:
63/070,294 →
EMI Reduction in PLCA-Based Networks Through Beacon Temporal Spreading
Application:
63/070,643 →
LCC (Low Cost Controllerless) Graphics Processing
Application:
63/076,413 →
Systems and Methods for Detecting Forcer Misalignment in a Wafer Prober
Application:
63/079,586 →
Method, System and Apparatus for Suppressing Controller Area Network Bus Ringing
Application:
63/081,966 →
Microcontroller with Increasing Protected Storage Area and Erase Protection
Application:
63/091,333 →
Modified Metal-Oxide-Metal (Mom) Capacitor for Integrated Circuit Monitoring
Application:
63/105,169 →
Short to Ground Protection and Automatic Recovery
Application:
63/110,239 →
Redundant Angular Inductive Sensor and Associated Method of Use
Application:
63/110,307 →
Thin-Film Resistor (Tfr) Formed in Damascene Interconnect
Application:
63/116,044 →
Electric Fuse (E-Fuse) Formed in Damascene Interconnect
Application:
63/116,265 →
Method and apparatus for determining when actual wear of a flash memory device differs from reliability states for the flash memory device
Application:
63/116,303 →
Cyclone Filter for Biological Contaminants
Application:
63/123,523 →
Semiconductor Device Packages Including Multiple Lead Frames and Related Methods
Application:
63/124,198 →
Circular Non-Linear Neural Network to Improve Solid State Drive?s Quality of Service (QoS)
Application:
63/125,966 →
Methods and Systems for Determining a Noise-Robust Acquisition Configuration for Operating a Sensor System
Application:
63/126,137 →
Direct port to port switching for low latency transfers in in TSN networks
Application:
63/126,482 →
Dc-Dc Converter with Improved Line Transient Rejection
Application:
63/129,867 →
Architectures for Storing and Retrieving System Data in a Non-Volatile Memory System
Application:
63/131,624 →
CAN Transmitter with Fast CANL Loop and Switched Output Cascode
Application:
63/132,511 →
Thin-Film Resistor (Tfr) with Improved Contacts
Application:
63/133,008 →
Input and Digital Output Mechanisms for Analog Neural Memory in a Deep Learning Artificial Neural Network
Application:
63/133,270 →
Dual Accumulators for Downsampling and Related Electronic Devices, Sampling Systems, and Methods
Application:
63/148,031 →
Stuck-At Fault Detectors and Trappers and Related Systems, Methods, and Devices
Application:
63/148,060 →
Artificial Intelligence (Ai) Based Oscillating Signal-Characteristic Offset Compensation, and Related Methods and Devices
Application:
63/149,111 →
Thin-Film Resistor (TFR) Having a TFR Film Providing a Diffusion Barrier
Application:
63/152,374 →
Integrated Circuit E-Fuse with E-Fuse Film Providing a Diffusion Barrier
Application:
63/152,907 →
Autonomous State-Less NAND Management for SSDs
Application:
63/153,906 →
Common View Time Transfer for Mass Market Gnss Devices and Related Apparatuses, Systems, and Methods
Application:
63/158,238 →
Single-Event-Upset-Resistant Storage Elements Including a Bypass Path, and Related Devices, Systems, and Methods
Application:
63/158,242 →
Ic Thermal Protection
Application:
63/159,510 →
Metal-Insulator-Metal (Mim) Capacitor and Thin-Film Resistor (Tfr) Formed Concurrent with Integrated Circuit (Ic) Interconnect
Application:
63/161,492 →
Method and Apparatus for Performing Convolution Neural Network Operations Using 3x3 Convolution Matrix
Application:
63/162,516 →
Automatic Protection Against Runt Pulses
Application:
63/162,993 →
Tswitch with Reduced Current Leakage
Application:
63/169,571 →
Differentiating Between Diesel Fuel and Water Using Capacitive Measurement Thereof
Application:
63/171,058 →
Multiprotocol USB Adaptive Charging
Application:
63/172,147 →
Three-Dimensional Metal-Insulator-Metal (Mim) Capacitor
Application:
63/175,138 →
Method and Apparatus for Pwm Control of Multi-Mode Switching Power Supply Using Iterative Average Current Mode Control
Application:
63/177,097 →
Process Including Laser and Saw Step Cutting to Form Wettable Flanks for a Surface-Mount Integrated Circuit Package
Application:
63/179,712 →
Method and Apparatus for Gather/Scatter operations in a Vector Processor
Application:
63/180,562 →
System of Multiple Stacks in a Processor Devoid of an Effective Address Generator
Application:
63/180,601 →
System and Method for Low-Latency Double Data Rate (Ddr) Chip-Kill Recovery
Application:
63/180,615 →
Method and Apparatus for Programmable Machine Learning and Inference
Application:
63/180,634 →
Automatically Trimming a PCB-Based L-C Tank
Application:
63/181,635 →
Spread Spectrum for a PCB-Based L-C Tank
Application:
63/181,651 →
Low-Complexity Encoder and Related Systems, Methods, and Devices
Application:
63/198,357 →
Low-Power Decoder with Improved Error Correction and Related Systems Methods and Devices
Application:
63/198,358 →
Privatized and Secured Low Frequency Signaling for Positioning, Navigation and Timing, and One-Way Messaging
Application:
63/198,476 →
Decision Feedback Equilization Taps and Current Integrating Summers and Related Systems, Methods, and Devices
Application:
63/198,871 →
Short Range Radar Using Channel Impulse Response Information and Related Sysems, Methods, and Devices
Application:
63/198,948 →
Ultra High-Speed Tap for Decision Feedback Equalizers (Dfe) with a Current Integrating Summer
Application:
63/198,958 →
Termination Impedance Isolator for Differential Transmission and Related Systems, Methods and Devices
Application:
63/198,962 →
Implementing Higher-Layer Processing on Time-Sensitive Data Blocks at a Physical-Layer Interface
Application:
63/199,058 →
Lead Frames for Semiconductor Packages with Increased Reliability and Related Semiconductor Device Packages and Methods
Application:
63/199,873 →
Sense Coil for Inductive Rotational-Position Sensing, and Related Devices, Systems, and Methods
Application:
63/200,751 →
On Chip Measurement of High Voltage Node with Low Voltage Measurement Circuit and Related Systems, Methods and Devices
Application:
63/200,837 →
Related Assignments
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Other recorded transfers of the patents in this record — the chain of ownership.
Patent Security Agreement
Jan 3, 2014
From: ATMEL CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC. AS ADMINISTRATIVE AGENT
Reel/Frame 031912/0173 →
Assignment of Assignor's Interest
Nov 16, 2015
From: PEAN, GUILLAUME; DEBOUT, VINCENT; MAUNIER, MARC
To: ATMEL ROUSSET S.A.S.
Reel/Frame 037052/0480 →
Termination and Release of Security Interest in Patent Collateral
Apr 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: ATMEL CORPORATION
Reel/Frame 038376/0001 →
Assignment of Assignor's Interest
Oct 25, 2016
From: KULKARNI, PRASAD; KANKANALA, RAMESH; DEB, DEBRAJ
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 040473/0284 →
Assignment of Assignor's Interest
Nov 9, 2016
From: PORTMANN, LIONEL
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 040581/0577 →
Assignment of Assignor's Interest
Dec 28, 2016
From: KLUGE, WOLFRAM; SACHSE, ERIC
To: ATMEL AUTOMOTIVE GMBH
Reel/Frame 040788/0408 →
Assignment of Assignor's Interest
Dec 28, 2016
From: ATMEL AUTOMOTIVE GMBH
To: ATMEL CORPORATION
Reel/Frame 041209/0719 →
Security Interest
Feb 10, 2017
From: SILICON STORAGE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0316 →
Security Interest
Feb 10, 2017
From: MICROCHIP TECHNOLOGY INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041675/0617 →
Security Interest
Jun 25, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 046426/0001 →
Security Interest
Sep 18, 2018
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 047103/0206 →
Assignment of Assignor's Interest
Nov 8, 2018
From: CATHERWOOD, MICHAEL; MICKEY, DAVID
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 047451/0639 →
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Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
Release of Security Interest
May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 053466/0011 →
Security Interest
Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
Security Interest
Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
Security Interest
Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
Security Interest
Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
Grant of Security Interest in Patent Rights
Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0238 →
Grant of Security Interest in Patent Rights
Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058213/0959 →
Grant of Security Interest in Patent Rights
Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
Grant of Security Interest in Patent Rights
Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 058214/0380 →
Release of Security Interest
Feb 25, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059333/0222 →
Release of Security Interest
Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059264/0384 →
Release of Security Interest
Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION
Reel/Frame 059263/0001 →