Charge pump for use in non-volatile flash memory devices
Numerous embodiments of an improved charge pump design are disclosed for generating the high voltages necessary to perform erase and program operations in non-volatile flash memory devices. In these embodiments, each boost stage in the charge pump is modified to overcome a deficiency in prior art charge pumps whereby voltage actually would decrease in the final boost stage. These modifications include the addition of one or more of a clock doubling circuit, a local self-precharge circuit, a feed-forward precharge circuit, a feed-backward precharge circuit, and a hybrid circuit comprising NMOS and PMOS transistors and diodes.
1. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
a transistor comprising a first terminal coupled to the input node, a gate coupled to the input node, and a second terminal coupled to the output terminal of the second capacitor;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.
2. The charge pump of claim 1 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
3. The charge pump of claim 1 , wherein each of the plurality of boost stages further comprises:
a transistor comprising a first terminal coupled to the input node, a gate coupled to the input node, and a second terminal coupled to the output node.
4. The charge pump of claim 3 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
5. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
a diode comprising a first terminal coupled to the input node and a second terminal coupled to the output node.
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.
6. The charge pump of claim 5 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
7. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
a local precharge device comprising a first terminal coupled to another boost stage in the plurality of boost stages or to a voltage source and a second terminal coupled to the output terminal of the second capacitor;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.
8. The charge pump of claim 7 , wherein the local precharge device is a Schottky diode or a p/n junction diode.
9. The charge pump of claim 7 , wherein the local precharge device is a diode-connected transistor.
10. The charge pump of claim 7 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
11. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising a plurality of boost stages and each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a diode comprising a first terminal coupled to the input node and a second terminal coupled to the output terminal of the second capacitor;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.
12. The charge pump of claim 11 , further comprising:
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node.
13. The charge pump of claim 11 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
14. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising:
a clock doubling circuit for receiving a first clock signal and generating a second clock signal, wherein the second clock signal has the same frequency and phase as the first clock signal and double the amplitude of the first clock signal; and
a plurality of boost stages, each of the plurality of boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving the first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving the second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor; and
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the plurality of boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the plurality of boost stages or provides the output voltage.
15. The charge pump of claim 14 , wherein each of the plurality of boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
16. The charge pump of claim 14 , wherein the clock doubling circuit comprises:
an inverter configured to receive the first clock signal and to generate an inverter output;
a capacitor comprising a first terminal for receiving the inverter output and a second terminal for generating a capacitor output;
an NMOS transistor comprising a gate configured to receive the first clock signal, a first terminal connected to an output node, and a second terminal connected to ground;
a first PMOS transistor comprising a gate configured to receive the first clock signal, a first terminal connected to the second terminal of the capacitor, and a second terminal connected to the output node;
a second PMOS transistor comprising a gate coupled to the output node, a first terminal connected to a voltage source, and a second terminal connected to the second terminal of the capacitor;
wherein the second clock signal is generated on the output node.
17. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising:
a first clock doubling circuit for receiving a first clock signal and generating a second clock signal, wherein the second clock signal has the same frequency and phase as the first clock signal and double the amplitude of the first clock signal;
a second clock doubling circuit for receiving a third clock signal and generating a fourth clock signal, wherein the fourth clock signal has the same frequency and phase as the third clock signal and double the amplitude of the third clock signal;
N boost stages of a first type, each of the N boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving the first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving the second clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the N boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the N boost stages or a boost stage in the M boost stages;
M boost stages of a second type, each of the M boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving the third clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a fourth clock signal and an output terminal;
a pass gate comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the M boost stages or to an output node of a boost stage in the N boost stages; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the M boost stages or provides the output voltage.
18. The charge pump of claim 17 , wherein each of the N boost stages and each of the M boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
19. A charge pump for receiving an input voltage and generating an output voltage, the charge pump comprising:
N boost stages of a first type, each of the N boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a transistor of a first conductivity type, the transistor comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a transistor of the first conductivity type, the transistor comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the N boost stages or to a source providing the input voltage; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the N boost stages or a boost stage in the M boost stages;
M boost stages of a second type, each of the M boost stages comprising:
an input node for the boost stage;
an output node for the boost stage;
a first capacitor comprising an input terminal for receiving a first clock signal and an output terminal coupled to the input node;
a second capacitor comprising an input terminal for receiving a second clock signal and an output terminal;
a pass gate comprising a transistor of a second conductivity type, the transistor comprising a first terminal coupled to the input node, a second terminal coupled to the output node, and a gate coupled to the output terminal of the second capacitor;
a boost gate comprising a transistor of a second conductivity type, the transistor comprising a first terminal coupled to the input node, a second terminal coupled to the output terminal of the second capacitor, and a gate coupled to the output node;
wherein the input node for the boost stage is coupled to an output node of another boost stage in the M boost stages or to an output node of a boost stage in the N boost stages; and
wherein the output node for the boost stage is coupled to an input node of another boost stage in the M boost stages or provides the output voltage.
20. The charge pump of claim 19 , wherein each of the N boost stages and each of the M boost stages further comprises:
a precharge gate comprising a first terminal coupled to a precharge voltage source, a gate coupled to the first terminal, and a second terminal coupled to the output node.
21. The charge pump of claim 19 , wherein the first conductivity type is p-channel and the second conductivity type is n-channel.
22. The charge pump of claim 19 , wherein the first conductivity type is n-channel and the second conductivity type is p-channel.
23. The charge pump of claim 20 , wherein the first conductivity type is p-channel and the second conductivity type is n-channel.
24. The charge pump of claim 20 , wherein the first conductivity type is n-channel and the second conductivity type is p-channel.