IP Library Granted Patent US 11,516,855
Granted Patent B2
US 11,516,855 · App. 16/587,583 · Granted Nov 29, 2022

Interface for improved media access, and related systems, methods, and devices

Inventors: Dixon Chen (Guangdong, CN); John Junling Zang (Guangdong, CN); Yanzi Xu (Guangdong, CN); Venkatraman Iyer (Austin, TX)
Assignee: Microchip Technology Incorporated
H04W74/085H04L7/02H04L47/62H04L69/32H04L69/324
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Quick Facts
Patent No.
US 11,516,855
App. No.
16/587,583
Granted
Nov 29, 2022
Kind
B2
Abstract

Disclosed are systems and devices for interfacing media access tuning circuitry that implements collision handling or traffic shaping with a reduced media independent interface (RMII). In some embodiments, an interface circuitry manages emulated signals generated by a media access tuning circuitry in response to detecting that the emulated signals would cause incorrect operation of an RMII. Also disclosed is a physical layer (PHY) device for a multidrop network. In some embodiments the PHY device implements physical layer collision techniques and operable to communicate with a media access control (MAC) device via an RMII, where the MAC is configured for carrier-sense multiple access (CSMA), CSMA with collision detection (CSMA/CD), or CSMA with collision avoidance (CSMA/CA). Also disclosed are processes for managing signaling at a PHY that implements physical layer collision avoidance (PLCA) or traffic shaping, as the case may be.

Claims (75)

1. A method, the method comprising:

receiving a first emulated carrier sense signal generated by a media access tuning circuitry to emulate a sensing of a carrier of a shared transmission medium;

generating a second emulated carrier sense signal responsive to detecting that the first emulated carrier sense signal would cause incorrect signaling at a reduced media independent interface (RMII) of a physical layer device;

providing the second emulated carrier sense signal to the RMII of the physical layer device; and

asserting or de-asserting an output signal associated with a carrier sense signal of the RMII of the physical layer device responsive to the second emulated carrier sense signal.

2. The method of claim 1 , wherein the asserting or de-asserting the output signal associated with the carrier sense signal of the RMII of the physical layer device comprises:

asserting the output signal for at least a portion of a period of time that the sensed carrier is idle.

3. The method of claim 1 , wherein the asserting or de-asserting the output signal associated with the carrier sense signal of the RMII of the physical layer device comprises:

de-asserting the output signal for at least a portion of a period of time that a sensed carrier is active.

4. The method of claim 1 , wherein the generating the second emulated carrier sense signal responsive to the detecting that the first emulated carrier sense signal would cause incorrect signaling at the RMII of the physical layer device comprises:

detecting an end of a data reception following a collision at the shared transmission medium; and

generating the second emulated carrier sense signal by modifying the first emulated carrier sense signal generated by the media access tuning circuitry to include an end of data reception signal responsive to the detecting the end of the data reception.

5. The method of claim 4 , comprising:

replicating the first emulated carrier sense signal generated by the media access tuning circuitry during the data reception; and

replicating the first emulated carrier sense signal generated by the media access tuning circuitry after providing the second emulated carrier sense signal to the RMII of the physical layer device.

6. The method of claim 1 , wherein the generating the second emulated carrier sense signal responsive to the detecting that the first emulated carrier sense signal would cause incorrect signaling at the RMII of the physical layer device comprises:

suppressing assertion of the first emulated carrier sense signal while waiting for a link layer device to finish providing transmit data.

7. The method of claim 6 , wherein the suppressing assertion of the first emulated carrier sense signal while waiting for the link layer device to finish providing transmit data comprises:

detecting a start of a data transmission by the link layer device; and

suppressing assertion of the first emulated carrier sense signal while a transmit buffer is being filled with first transmit data that is received from the link layer device.

8. The method of claim 7 , wherein the suppressing assertion of the first emulated carrier sense signal while waiting for the link layer device to finish providing transmit data comprises:

suppressing assertion of the first emulated carrier sense signal while the transmit buffer is being filled with second transmit data that is received from the link layer device and the first transmit data is being moved from the transmit buffer to the shared transmission medium.

9. The method of claim 8 , wherein suppressing assertion of the first emulated carrier sense signal while waiting for the link layer device to finish providing transmit data comprises:

filling a receive buffer with symbols indicative of no valid data present; and

replicating the first emulated carrier sense signal generated by the media access tuning circuitry while the second transmit data is being moved from the transmit buffer to the shared transmission medium.

10. The method of claim 4 , wherein the generating the second emulated carrier sense signal responsive to detecting that the first emulated carrier sense signal would cause incorrect signaling at the RMII of the physical layer device comprises:

detecting synchronization bytes at a receive buffer of the media access tuning circuitry; and

generating the second emulated carrier sense signal by modifying the first emulated carrier sense signal generated by the media access tuning circuitry to include a start of a data reception signal responsive to the detecting the synchronization bytes at the receive buffer of the media access tuning circuitry.

11. The method of claim 10 , comprising:

replicating the first emulated carrier sense signal generated by the media access tuning circuitry until the detecting the synchronization bytes at the receive buffer of the media access tuning circuitry.

12. The method of claim 11 , comprising: providing the second emulated carrier sense signal to the RMII of the physical layer device before the synchronization bytes are provided to a link layer device.

13. The method of claim 12 , comprising: providing the second emulated carrier sense signal to the RMII of the physical layer device after all receive buffer bytes are provided to the link layer device.

14. The method of claim 13 , comprising:

replicating the first emulated carrier sense signal generated by the media access tuning circuitry after providing the second emulated carrier sense signal to the RMII of the physical layer device.

15. The method of claim 1 , wherein the generating the second emulated carrier sense signal comprises modifying the first emulated carrier sense signal to include a gap.

16. The method of claim 1 , wherein generating the second emulated carrier sense signal comprises adapting a portion of the first emulated carrier sense signal to have a detectable shape.

17. A physical layer (PHY) device, comprising:

a transmission circuitry to send and receive data to and from a shared transmission medium;

sensing circuitry to sense a carrier of the shared transmission medium;

a media access tuning circuitry to generate a first emulated carrier sense signal;

an interface circuitry to:

receive the first emulated carrier sense signal generated by the media access tuning circuitry;

generate a second emulated carrier sense signal responsive to detection that the first emulated carrier sense signal would cause incorrect signaling at a reduced media independent interface (RMII); and

provide the second emulated carrier sense signal to the RMII; and

one or more input/outputs, wherein an output of the one or more input/outputs is associated with an output signal for a carrier sense signal of a reduced media independent interface (RMII).

18. The device of claim 17 , wherein the output signal is assertable for at least a portion of a period of time that a sensed carrier is idle.

19. The device of claim 17 , wherein the output signal is de-assertable for at least a portion of a period of time that a sensed carrier is active.

20. The device of claim 17 , wherein the interface circuitry to generate the second emulated carrier sense signal responsive to the detecting that the first emulated carrier sense signal would cause incorrect signaling at the RMII by:

a detection of an end of a data reception following a collision at the shared transmission medium; and

a generation of the second emulated carrier sense signal by a modification of the first emulated carrier sense signal generated by the media access tuning circuitry to include an end of data reception signal responsive to the detecting the end of the data reception.

21. The device of claim 20 , wherein the interface circuitry to:

replicate the first emulated carrier sense signal generated by during the data reception; and

replicate the first emulated carrier sense signal generated by the media access tuning circuitry after providing the second emulated carrier sense signal to the RMII.

22. The device of claim 17 , wherein the interface circuitry to generate the second emulated carrier sense signal responsive to the detection that the first emulated carrier sense signal would cause incorrect signaling at the RMII by:

suppression of the first emulated carrier sense signal while waiting for a link layer device to finish providing transmit data.

23. The device of claim 22 , wherein the interface circuitry to suppress the first emulated carrier sense signal while waiting for the link layer device to finish providing transmit data by:

a detection of a start of a data transmission by the link layer device; and

a suppression of the first emulated carrier sense signal while first transmit data is being received from the link layer device and a transmit buffer is being filled with the first transmit data.

24. The device of claim 23 , wherein the interface circuitry is to suppress the first emulated carrier sense signal while waiting for the link layer device to finish providing transmit data by:

suppressing the first emulated carrier sense signal while second transmit data is being received from the link layer device and the transmit buffer is being filled with the second transmit data.

25. The device of claim 24 , wherein the interface circuitry to:

fill a receive buffer with symbols indicative of no valid data present while transmission circuitry moves the second transmit data from the transmit buffer to the shared transmission medium; and

replicate the first emulated carrier sense signal generated by the media access tuning circuitry while the transmission circuitry moves the second transmit data from the transmit buffer to the shared transmission medium.

26. The device of claim 17 , wherein the interface circuitry to generate the second emulated carrier sense signal responsive to the detecting that the first emulated carrier sense signal would cause incorrect signaling at the RMII by:

a detection of synchronization bytes at a receive buffer of the media access tuning circuitry; and

a generation of the second emulated carrier sense signal by a modification of the first emulated carrier sense signal generated by the media access tuning circuitry to include a start of a data reception signal responsive to the detecting the synchronization bytes at the receive buffer of the media access tuning circuitry.

27. The device of claim 26 , wherein the interface circuitry is to provide the second emulated carrier sense signal to the RMII before the synchronization bytes are provided to a link layer device.

28. The device of claim 27 , wherein the interface circuitry to:

replicate the first emulated carrier sense signal generated by the media access tuning circuitry until the detection of the synchronization bytes at the receive buffer of the media access tuning circuitry.

29. The device of claim 28 , wherein the interface circuitry to provide the second emulated carrier sense signal to the RMII after all the data from the receive buffer is transferred to the link layer device.

30. The device of claim 29 , wherein the interface circuitry to:

replicate the first emulated carrier sense signal generated by the media access tuning circuitry after providing the second emulated carrier sense signal to the RMII.

31. The device of claim 17 , wherein the interface circuitry to generate the second emulated carrier sense signal by a modification of the first emulated carrier sense signal to include a gap.

32. The device of claim 17 , wherein the interface circuitry to generate the second emulated carrier sense signal by a modification of the first emulated carrier sense signal to include a pulse.

33. The device of claim 17 , wherein the interface circuitry to generate the second emulated carrier sense signal by an adaptation of a portion of the first emulated carrier sense signal to have a detectable shape.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2019
From: CHEN, DIXON; ZANG, JOHN JUNLING; XU, YANZI; IYER, VENKAT
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 050566/0679 →