IP Library Granted Patent US 11,665,020
Granted Patent B2
US 11,665,020 · App. 16/587,505 · Granted May 30, 2023

Detecting collisions on a network

Inventors: John Junling Zang (Guangdong, CN); Dixon Chen (Guangdong, CN); Yanzi Xu (Guangdong, CN); Henry Liang (Guangdong, CN)
Assignee: Microchip Technology Incorporated
H04L12/413
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Quick Facts
Patent No.
US 11,665,020
App. No.
16/587,505
Granted
May 30, 2023
Kind
B2
Abstract

Various embodiments relate to detecting collisions on a communication network. A method may include transmitting a first signal to a shared bus. The method may also include observing a second signal at the shared bus during the transmitting. Further, the method may include detecting a collision on the shared bus in response to an amplitude of the second signal being one of greater than a first threshold and less than a second threshold.

Claims (52)

1. A method of operating a physical layer (PHY) of a 10 megabits per second (Mbps) Single Pair Ethernet (10SPE) network, comprising:

transmitting a first signal from a node to a shared bus;

observing, before an end of a programmed bit time, a second signal that is at the shared bus, the second signal different than the first signal;

comparing the observed second signal to a first threshold value and to a second threshold value, the second threshold value lower than the first threshold value; and

detecting a collision on the shared bus in response to the observed second signal being greater than the first threshold value or less than the second threshold value,

wherein the end of programmed bit time occurs before an end of bit time for transmitting the first signal.

2. The method of claim 1 , wherein comparing the observed second signal to the first threshold value and the second threshold value comprises comparing an amplitude of a differential signal to the first threshold value and to the second threshold value.

3. The method of claim 1 , comprising:

generating a signal indicating collision detection responsive to a number of transmitted bits of the first signal being less than the programmed bit time.

4. The method of claim 1 , comprising:

generating a signal indicating no collision detection responsive to a number of transmitted bits of the first signal being greater than the programmed bit time.

5. The method of claim 1 , comprising:

terminating detecting the collision at least partially responsive to a number of transmitted bits of the first signal being greater than the programmed bit time.

6. A method of operating a single pair Ethernet physical layer (PHY), comprising:

transmitting a first signal to a shared bus; and

initiating a collision threshold detection process responsive to the transmitting the first signal, the collision threshold detection process including:

observing, before an end of programmed bit time, an amplitude of a second signal at the shared bus, the second signal different than the first signal;

comparing the observed amplitude of the second signal to a first threshold value and to a second threshold value, the second threshold value lower than the first threshold value; and

determining a collision occurred responsive to the observed amplitude of the second signal being greater than the first threshold value or being less than the second threshold value,

wherein the end of programmed bit time occurs before an end of bit time for transmitting the first signal.

7. The method of claim 6 , wherein observing the amplitude of the second signal comprises observing the amplitude of a differential signal.

8. The method of claim 6 , wherein performing collision threshold detection comprises:

programming a signal detector of the PHY to the first threshold value;

comparing, via the signal detector and during a first portion of the programmed bit time, the observed amplitude of the second signal to the first threshold value;

programming the signal detector of the PHY to the second threshold value; and

comparing, via the signal detector and during a second portion of the programmed bit time, the observed amplitude of the second signal to the second threshold value,

wherein determining the collision has occurred comprises determining the collision has occurred in response to the observed amplitude of the second signal being either greater than the first threshold value or less than the second threshold value.

9. The method of claim 6 , comprising:

utilizing an output of the collision threshold detection process responsive to an end of the collision threshold detection process occurring before the end of programmed bit time.

10. The method of claim 6 , comprising:

ignoring an output of the collision threshold detection process responsive to a number of transmitted bits of the first signal being greater than the programmed bit time.

11. The method of claim 6 ,

terminating the collision threshold detection process at least partially responsive to a number of transmitted bits of the first signal being greater than the programmed bit time.

12. A physical layer (PHY) device, comprising:

a transmitter to transmit a first signal via a shared bus;

a signal detector to:

observe a second signal at a shared bus, the second signal different than the first signal;

compare an amplitude of the observed second signal to a first threshold value during a first phase of a programmable bit time and to a second threshold value during a second phase of the programmable bit time, the second phase subsequent to the first phase; and

generate a detector output signal based on a comparison of the amplitude of the observed second signal to the first threshold value and to the second threshold value,

wherein an end of programmed bit time occurs before an end of bit time for transmitting the first signal; and

collision logic coupled to the signal detector and to:

receive the detector output signal; and

determine whether a collision occurred on the shared bus based on the detector output signal.

13. The device of claim 12 , wherein the signal detector is to receive a control signal for programming at least one of the first threshold value or the second threshold value.

14. The device of claim 12 , comprising a calibration unit to convey one or more controls signals to the signal detector for setting at least one of the first threshold value or the second threshold value.

15. The device of claim 12 , wherein the signal detector includes:

a first comparator to receive a differential signal including the second signal and generate a first detection signal;

a second comparator to receive the differential signal including the second signal and generate a second detection signal; and

an OR gate to receive the first detection signal and the second detection signal and generate the detector output signal.

16. The device of claim 12 , wherein the signal detector is to detect incoming signals in a receive mode.

17. The device of claim 12 , wherein the collision logic is to sample the detector output signal at a rate of substantially one sample per 10 nanoseconds.

18. The device of claim 12 , wherein the collision logic to determine whether a collision occurred on the shared bus based on the detector output signal and based on whether a number of transmitted bits of the first signal is greater than the programmed value of the programmable bit time.

Assignments (13)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059358/0335 →
RELEASE OF SECURITY INTEREST Recorded Feb 28, 2022
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059263/0001 →
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 19, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 058214/0625 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 052856/0909 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2019
From: ZANG, JOHN JUNLING; CHEN, DIXON; XU, YANZI; LIANG, HENRY
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 050584/0331 →
Priority Claims (1)
CN 201910784565.6 · Aug 23, 2019 · national
Continuity (1)
Related Publication 20210058269A1 · Feb 25, 2021