Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network
Numerous embodiments of a data refresh method and apparatus for use with a vector-by-matrix multiplication (VMM) array in an artificial neural network are disclosed. Various embodiments of a data drift detector suitable for detecting data drift in flash memory cells within the VMM array are disclosed.
1. A method of detecting data drift and refreshing data in a selected flash memory cell in an analog neuromorphic memory system, the method comprising:
sensing a first voltage stored in a floating gate of the selected flash memory cell;
comparing the first voltage with a second voltage provided by a reference circuit;
if the first voltage exceeds the second voltage, refreshing the data stored in the floating gate by storing a third voltage on the floating gate, wherein the third voltage is closer to the second voltage than is the first voltage; wherein the refreshing is done by retransferring a training weight to the selected memory cell.
2. The method of claim 1 , wherein the reference circuit comprises a voltage source.
3. The method of claim 1 , wherein the reference circuit comprises a reference memory cell.
4. The method of claim 1 , wherein the selected memory cell is a split gate memory cell.
5. The method of claim 1 , wherein the selected memory cell is a stacked gate memory cell.
6. The method of claim 1 , wherein the selected memory cell is configured in a source follower mode.
7. The method of claim 1 , wherein the refreshing is done with a restored amount specifically for a current level.
8. A method of detecting data drift and refreshing data in a selected flash memory cell in an analog neuromorphic memory system, the method comprising:
sensing a first current drawn by a selected flash memory cell during a read operation;
comparing the first current with a second current drawn by a reference circuit;
if the first current exceeds the second current, refreshing the data stored in a floating gate of the selected memory cell, such that the selected flash memory cell draws a third current during a read operation, wherein the third current is closer to the second current than is the first current; wherein the refreshing is done by retransferring a training weight to the selected memory cell.
9. The method of claim 8 , wherein the reference circuit comprises a current source.
10. The method of claim 8 , wherein the selected memory cell is a split gate memory cell.
11. The method of claim 8 , wherein the selected memory cell is a stacked gate memory cell.
12. The method of claim 8 , wherein the refreshing is done with a restored amount specifically for a current level.
13. A method of detecting data drift and refreshing data in a selected flash memory cell in an analog neuromorphic memory system, the method comprising:
sampling a first current drawn by a selected flash memory cell during a read operation to generate a first sampled value;
sampling a second current drawn by a reference circuit to generate a second sampled value;
comparing the first sampled value and the second sampled value;
if the first sampled value exceeds the second sampled value, refreshing the data stored in a floating gate of the selected memory cell, such that the selected flash memory cell draws a third current during a read operation, wherein the third current is closer to the second current than is the first current; wherein the refreshing is done by retransferring a training weight to the selected memory cell.
14. The method of claim 13 , wherein the reference circuit comprises a current source.
15. The method of claim 13 , wherein the selected memory cell is a split gate memory cell.
16. The method of claim 13 , wherein the selected memory cell is a stacked gate memory cell.
17. The method of claim 13 , wherein the refreshing is done with a restored amount specifically for a current level.
18. A method of detecting data drift and refreshing data in a selected flash memory cell in an analog neuromorphic memory system, the method comprising:
sensing a first current drawn by a selected flash memory cell during a read operation;
comparing the first current with a second current drawn by a reference circuit;
comparing the first current with a third current drawn by another reference circuit;
if the first current exceeds the third current, refreshing the data stored in a floating gate of the selected memory cell, such that the selected flash memory cell draws a current during a read operation, wherein the restored current is between the second and the third current; or
if the first current exceeds the second current and does not exceed the third current, refraining from refreshing the data; wherein the refreshing is done by retransferring a training weight to the selected memory cell.
19. The method of claim 18 , wherein the reference circuit comprises a current source.
20. The method of claim 18 , wherein the selected memory cell is a split gate memory cell.
21. The method of claim 18 , wherein the selected memory cell is a stacked gate memory cell.
22. The method of claim 18 , wherein the refreshing is done with a restored amount specifically for current level.